Asking about SPI master loopback mode on S32K148

namnguyenviet_001 — Tue, 09 Jun 2026 07:35:02 GMT

Hello everyone,

I am looking for the maximum baudrate of SPI running in RUN/HSRUN mode, and I'm curious about the SPI master loopback mode, as it could reach the higher maximum baudrate of SPI, compares to the SPI master.

What is master loopback mode? Does it indeed have a higher maximum baudrate than spi mode? Any restriction to run it compares to the master mode?

Many thanks,

Nam

Re: Asking about SPI master loopback mode on S32K148

VaneB — Tue, 09 Jun 2026 22:25:30 GMT

Hi @namnguyenviet_001

In standard single-bit SPI operation, the bit rate (in Mbps) is numerically equal to the SPI clock frequency (in MHz), since one bit is transferred per clock cycle.

Regarding Master Loopback mode (available only for LPSPI0), as described in notes 5 and 6 below Table 46 of the S32K1xx Data Sheet, Rev. 15, the LPSPI_SCK clock can be delayed for input data sampling by enabling the LPSPI_CFGR1[SAMPLE] bit. This feature improves the setup time of the received data path, allowing operation at higher baud rates.

The following simplified diagram of how the CFGR1[SAMPLE] feature works:

BR, VaneB

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Asking about SPI master loopback mode on S32K148

Re: Asking about SPI master loopback mode on S32K148