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    <title>topic Re: S32K396 LPSPI DMA in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K396-LPSPI-DMA/m-p/2375593#M58988</link>
    <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/201913"&gt;@VaneB&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for your resonds. I got it working now . These are the things i had to do:&lt;/P&gt;&lt;P&gt;First of all, your absoloutly right. The clock for the LPSPI 1-5 is different than the clock for the LPSPI0. With that i saw a CLK and a CS on my scope, but still no data.&lt;/P&gt;&lt;P&gt;Then i switch from the IntCtrl_Ip Driver to the Platform Driver which is AUTOSAR-compliant, with the help of one of your examples. Now my components look like this:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Luis1_0-1780470802710.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/387656i6422A83FCF6FB97D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Luis1_0-1780470802710.png" alt="Luis1_0-1780470802710.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Now (or already bevor the new driver), I had new Data some of the time, but most of the time it stayed the same. Changing the spi transmit buffers to the non cacheable area did the final trick for me. You explained that here:&lt;LI-MESSAGE title="S32K344 - LPSPI and DMA configuration" uid="2089294" url="https://community.nxp.com/t5/S32K/S32K344-LPSPI-and-DMA-configuration/m-p/2089294#U2089294" discussion_style_icon_css="lia-mention-container-editor-message lia-img-icon-forum-thread lia-fa-icon lia-fa-forum lia-fa-thread lia-fa"&gt;&lt;/LI-MESSAGE&gt;&lt;/P&gt;&lt;P&gt;Here is my code with the no cacheable area:&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SPI_START_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Spi_MemMap.h"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;__attribute__&lt;/SPAN&gt;&lt;SPAN&gt;((aligned(32))) &lt;/SPAN&gt;&lt;SPAN&gt;uint8&lt;/SPAN&gt;&lt;SPAN&gt; tel_rx_dma[MAX_BYTES_RX_TX_ARRAY];&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;__attribute__&lt;/SPAN&gt;&lt;SPAN&gt;((aligned(32))) &lt;/SPAN&gt;&lt;SPAN&gt;uint8&lt;/SPAN&gt;&lt;SPAN&gt; tel_tx_dma[MAX_BYTES_RX_TX_ARRAY];&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SPI_STOP_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Spi_MemMap.h"&lt;/SPAN&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;After that i got it working for LPSPI0 as a Slave, (LPSPI1 was master) pretty quick too.&lt;/P&gt;&lt;P&gt;Thanks&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/201913"&gt;@VaneB&lt;/a&gt;&amp;nbsp;!&lt;/P&gt;&lt;P&gt;Luis&lt;/P&gt;</description>
    <pubDate>Wed, 03 Jun 2026 07:35:42 GMT</pubDate>
    <dc:creator>Luis1</dc:creator>
    <dc:date>2026-06-03T07:35:42Z</dc:date>
    <item>
      <title>S32K396 LPSPI DMA</title>
      <link>https://community.nxp.com/t5/S32K/S32K396-LPSPI-DMA/m-p/2373027#M58938</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;i can't get lpspi with dma to work. I have looked into many example projects and community posts, but it doesnt seem to fix my problem. A lot of posts and examples are for the s32k344 or similar. I think i am missing something for the S32k396. Here are my settings. I am using the&amp;nbsp;S32K3 Real-Time Drivers AUTOSAR R23-11 Version 7.0.0.&lt;/P&gt;&lt;P&gt;SPI works fine when i disable DMA. So the Pins and Ports should be correct.&lt;/P&gt;&lt;P&gt;Mcl:&lt;/P&gt;&lt;P&gt;i have enabled DMA support.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Luis1_2-1780050952661.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/387270iFF6FC61CE06B744E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Luis1_2-1780050952661.png" alt="Luis1_2-1780050952661.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Luis1_3-1780050990062.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/387271iAD31BCA91B8B51DC/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Luis1_3-1780050990062.png" alt="Luis1_3-1780050990062.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;same with Rx, just different names ("Tx" -&amp;gt; "Rx")&lt;/P&gt;&lt;P&gt;Mcu:&lt;/P&gt;&lt;P&gt;In Mcu/McuModuleConfiguration/McuModeSettingConf/McuPeripheral i&amp;nbsp;have enabled the peripheral clocks for: eDMA, eDMA_TCD_0 and&amp;nbsp;eDMA_TCD_1, DMAMUX_0, LPSPI_1.&lt;/P&gt;&lt;P&gt;RM:&lt;/P&gt;&lt;P&gt;I enabled the dma mux support and enabled global init.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Luis1_4-1780051351639.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/387272i72F7A2B57371F96B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Luis1_4-1780051351639.png" alt="Luis1_4-1780051351639.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;SPI:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Luis1_5-1780051429008.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/387273iCD9B629463F95119/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Luis1_5-1780051429008.png" alt="Luis1_5-1780051429008.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Luis1_6-1780051448572.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/387274iF87DDDCF0422EDDA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Luis1_6-1780051448572.png" alt="Luis1_6-1780051448572.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Luis1_7-1780051515307.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/387275iE45C27B924DE1CA3/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Luis1_7-1780051515307.png" alt="Luis1_7-1780051515307.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;IntCtrl_Ip:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Luis1_8-1780051677533.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/387278i7D15A1882AA4600F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Luis1_8-1780051677533.png" alt="Luis1_8-1780051677533.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;And finally my init:&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;P&gt;&lt;SPAN&gt;//initialization of the MCAL Autosar drivers&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;//CLK&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt;(Clock_Ip_Init(&amp;amp;Mcu_aClockConfigPB_BOARD_InitPeripherals[0]) == &lt;/SPAN&gt;&lt;SPAN&gt;CLOCK_IP_ERROR&lt;/SPAN&gt;&lt;SPAN&gt;){&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;return&lt;/SPAN&gt;&lt;SPAN&gt; false;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;SPAN&gt;//else CLOCK_IP_SUCCESS&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;//MCU&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Mcu_Init(&amp;amp;Mcu_Config_BOARD_InitPeripherals);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;//Port&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Port_Init(&amp;amp;Port_Config_BOARD_InitPeripherals);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;//Interrupts&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt;(IntCtrl_Ip_Init(&amp;amp;IntCtrlConfig_0) == &lt;/SPAN&gt;&lt;SPAN&gt;INTCTRL_IP_STATUS_ERROR&lt;/SPAN&gt;&lt;SPAN&gt;){&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;return&lt;/SPAN&gt;&lt;SPAN&gt; false;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;//DMA&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Rm_Init(&amp;amp;Rm_Config_BOARD_INITPERIPHERALS);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Mcl_Init(&amp;amp;Mcl_Config_BOARD_InitPeripherals);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;//LPSPI1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Lpspi_Ip_StatusType&lt;/SPAN&gt;&lt;SPAN&gt; lpspi_status = Lpspi_Ip_Init(&amp;amp;Lpspi_Ip_PhyUnitConfig_SpiPhyUnit_1_Instance_1_BOARD_InitPeripherals);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;if&lt;/SPAN&gt;&lt;SPAN&gt;(lpspi_status==&lt;/SPAN&gt;&lt;SPAN&gt;LPSPI_IP_STATUS_SUCCESS&lt;/SPAN&gt;&lt;SPAN&gt;){&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Lpspi_Ip_UpdateTransferMode(Lpspi_Ip_DeviceAttributes_SpiExternalDevice_1_Instance_1_BOARD_InitPeripherals.&lt;/SPAN&gt;&lt;SPAN&gt;Instance&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;LPSPI_IP_INTERRUPT&lt;/SPAN&gt;&lt;SPAN&gt;); &lt;/SPAN&gt;&lt;SPAN&gt;//transfer: interrupt&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Lpspi_Ip_UpdateLsb(&amp;amp;Lpspi_Ip_DeviceAttributes_SpiExternalDevice_1_Instance_1_BOARD_InitPeripherals, 0); &lt;/SPAN&gt;&lt;SPAN&gt;//0=MSB (big endian)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;SPAN&gt;else&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;return&lt;/SPAN&gt;&lt;SPAN&gt; false;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;For sending i use something like this:&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;P&gt;&lt;SPAN&gt;Lpspi_Ip_AsyncTransmit(&amp;amp;&lt;/SPAN&gt;&lt;SPAN&gt;Lpspi_Ip_DeviceAttributes_SpiExternalDevice_1_Instance_1_BOARD_InitPeripherals&lt;/SPAN&gt;&lt;SPAN&gt;,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;tx_buffer,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;rx_buffer,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;1,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;lpspi1_callback&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you for helping!&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Luis&lt;/SPAN&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 29 May 2026 11:14:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K396-LPSPI-DMA/m-p/2373027#M58938</guid>
      <dc:creator>Luis1</dc:creator>
      <dc:date>2026-05-29T11:14:20Z</dc:date>
    </item>
    <item>
      <title>Re: S32K396 LPSPI DMA</title>
      <link>https://community.nxp.com/t5/S32K/S32K396-LPSPI-DMA/m-p/2373201#M58943</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/260015"&gt;@Luis1&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;First, based on the information provided, it appears that you are mixing low-level drivers (IP layer) with high-level drivers (MCAL). This approach is generally not recommended, particularly if your implementation is intended to be AUTOSAR-compliant.&lt;/P&gt;
&lt;P&gt;Regarding your configuration, I have the following observation:&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;For LPSPI1, you have assigned AIPS_PLAT_CLK as the SpiPhyUnitClockRef. However, the source clock for this is AIPS_SLOW_CLK. Therefore, you need to include this clock in the McuClockReferencePoint configuration within the MCU driver and assign it accordingly to this SPI instance.&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;Regarding your code, as mentioned earlier, you are mixing both software layers, which is not recommended. There are some exceptions when working with low-level drivers, as certain modules are only available in MCAL (for example, the RM), where mixing layers may be expected.&lt;/P&gt;
&lt;P&gt;I suggest reviewing the following thread, where two examples are provided: one using the IP layer and another using MCAL. This will help you understand the differences in the APIs required for each approach. Please note that the examples are not specifically intended for S32K396 devices, but they can still serve as a useful reference.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K344-SPI-Transmit-amp-Receive-Using-DMA-DS3-5-RTD500/ta-p/1992224" target="_blank" rel="noopener"&gt;Example S32K344 SPI Transmit &amp;amp; Receive Using DMA DS3.5 RTD500&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR, VaneB&lt;/P&gt;</description>
      <pubDate>Fri, 29 May 2026 17:26:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K396-LPSPI-DMA/m-p/2373201#M58943</guid>
      <dc:creator>VaneB</dc:creator>
      <dc:date>2026-05-29T17:26:19Z</dc:date>
    </item>
    <item>
      <title>Re: S32K396 LPSPI DMA</title>
      <link>https://community.nxp.com/t5/S32K/S32K396-LPSPI-DMA/m-p/2375593#M58988</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/201913"&gt;@VaneB&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for your resonds. I got it working now . These are the things i had to do:&lt;/P&gt;&lt;P&gt;First of all, your absoloutly right. The clock for the LPSPI 1-5 is different than the clock for the LPSPI0. With that i saw a CLK and a CS on my scope, but still no data.&lt;/P&gt;&lt;P&gt;Then i switch from the IntCtrl_Ip Driver to the Platform Driver which is AUTOSAR-compliant, with the help of one of your examples. Now my components look like this:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Luis1_0-1780470802710.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/387656i6422A83FCF6FB97D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Luis1_0-1780470802710.png" alt="Luis1_0-1780470802710.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Now (or already bevor the new driver), I had new Data some of the time, but most of the time it stayed the same. Changing the spi transmit buffers to the non cacheable area did the final trick for me. You explained that here:&lt;LI-MESSAGE title="S32K344 - LPSPI and DMA configuration" uid="2089294" url="https://community.nxp.com/t5/S32K/S32K344-LPSPI-and-DMA-configuration/m-p/2089294#U2089294" discussion_style_icon_css="lia-mention-container-editor-message lia-img-icon-forum-thread lia-fa-icon lia-fa-forum lia-fa-thread lia-fa"&gt;&lt;/LI-MESSAGE&gt;&lt;/P&gt;&lt;P&gt;Here is my code with the no cacheable area:&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SPI_START_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Spi_MemMap.h"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;__attribute__&lt;/SPAN&gt;&lt;SPAN&gt;((aligned(32))) &lt;/SPAN&gt;&lt;SPAN&gt;uint8&lt;/SPAN&gt;&lt;SPAN&gt; tel_rx_dma[MAX_BYTES_RX_TX_ARRAY];&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;__attribute__&lt;/SPAN&gt;&lt;SPAN&gt;((aligned(32))) &lt;/SPAN&gt;&lt;SPAN&gt;uint8&lt;/SPAN&gt;&lt;SPAN&gt; tel_tx_dma[MAX_BYTES_RX_TX_ARRAY];&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt;&lt;SPAN&gt; SPI_STOP_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Spi_MemMap.h"&lt;/SPAN&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;After that i got it working for LPSPI0 as a Slave, (LPSPI1 was master) pretty quick too.&lt;/P&gt;&lt;P&gt;Thanks&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/201913"&gt;@VaneB&lt;/a&gt;&amp;nbsp;!&lt;/P&gt;&lt;P&gt;Luis&lt;/P&gt;</description>
      <pubDate>Wed, 03 Jun 2026 07:35:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K396-LPSPI-DMA/m-p/2375593#M58988</guid>
      <dc:creator>Luis1</dc:creator>
      <dc:date>2026-06-03T07:35:42Z</dc:date>
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