<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S32KのトピックRe: #S32K144 Cache write Test</title>
    <link>https://community.nxp.com/t5/S32K/S32K144-Cache-write-Test/m-p/2367673#M58701</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/262511"&gt;@joshua9264&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;It is technically possible to change the cache value through the LMEN registers.&lt;/P&gt;
&lt;P&gt;Let me create a simple test project.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR, Daniel&lt;/P&gt;</description>
    <pubDate>Tue, 19 May 2026 12:39:38 GMT</pubDate>
    <dc:creator>danielmartynek</dc:creator>
    <dc:date>2026-05-19T12:39:38Z</dc:date>
    <item>
      <title>#S32K144 Cache write Test</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-Cache-write-Test/m-p/2365562#M58587</link>
      <description>&lt;P&gt;&lt;SPAN&gt;##S32K144 support modifying cache values? Why is it that after I modify a value, reading the same address still returns the original value? Additionally, can the cache's parity bit be tested？thanks&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="joshua9264_0-1778760071876.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/385442iBDC9D720CC471B1D/image-size/large?v=v2&amp;amp;px=999" role="button" title="joshua9264_0-1778760071876.png" alt="joshua9264_0-1778760071876.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 14 May 2026 12:03:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-Cache-write-Test/m-p/2365562#M58587</guid>
      <dc:creator>joshua9264</dc:creator>
      <dc:date>2026-05-14T12:03:09Z</dc:date>
    </item>
    <item>
      <title>Re: #S32K144 Cache write Test</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-Cache-write-Test/m-p/2367673#M58701</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/262511"&gt;@joshua9264&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;It is technically possible to change the cache value through the LMEN registers.&lt;/P&gt;
&lt;P&gt;Let me create a simple test project.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR, Daniel&lt;/P&gt;</description>
      <pubDate>Tue, 19 May 2026 12:39:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-Cache-write-Test/m-p/2367673#M58701</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2026-05-19T12:39:38Z</dc:date>
    </item>
    <item>
      <title>Re: #S32K144 Cache write Test</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-Cache-write-Test/m-p/2368501#M58742</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/262511"&gt;@joshua9264&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Have a look at this example:&lt;BR /&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K142-LMEM-Cache-v1-0-S32DS3-6-RTD300/ta-p/2368498" target="_blank"&gt;https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K142-LMEM-Cache-v1-0-S32DS3-6-RTD300/ta-p/2368498&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
      <pubDate>Wed, 20 May 2026 13:45:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-Cache-write-Test/m-p/2368501#M58742</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2026-05-20T13:45:08Z</dc:date>
    </item>
    <item>
      <title>Re: #S32K144 Cache write Test</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-Cache-write-Test/m-p/2369080#M58760</link>
      <description>OK，thank you，i will have a test</description>
      <pubDate>Thu, 21 May 2026 03:25:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-Cache-write-Test/m-p/2369080#M58760</guid>
      <dc:creator>joshua9264</dc:creator>
      <dc:date>2026-05-21T03:25:34Z</dc:date>
    </item>
  </channel>
</rss>

