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    <title>S32KのトピックRe: BUSOFF</title>
    <link>https://community.nxp.com/t5/S32K/BUSOFF/m-p/2365330#M58582</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P style="font-weight: 400;"&gt;FlexCAN implements 2 ways of bus off recovery, depending of CTRL1[BOFFREC] setting: &lt;BR /&gt;0b - Automatic recovering from Bus Off state enabled.&lt;BR /&gt;1b - Automatic recovering from Bus Off state disabled.&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;
&lt;P style="font-weight: 400;"&gt;In case the automatic recovery mode is disabled, BOFF_REC = 1, the recovery from bus-off starts after both independent events have become true:&lt;/P&gt;
&lt;UL style="font-weight: 400;"&gt;
&lt;LI&gt;128 occurrences of 11 consecutive recessive bits on the CAN bus have been monitored&lt;/LI&gt;
&lt;LI&gt;BOFF_REC&amp;nbsp; has been cleared by the user&lt;/LI&gt;
&lt;/UL&gt;
&lt;P style="font-weight: 400;"&gt;So if negation happens&lt;/P&gt;
&lt;P style="font-weight: 400;"&gt;- before 128 sequences of 11 recessive bits are detected on the CAN bus, then Bus Off recovery happens in similar way as in automatic recovery mode.&lt;/P&gt;
&lt;P style="font-weight: 400;"&gt;- after 128 sequences of 11 recessive bits occurred, then FlexCAN will resynchronize to the bus by waiting for 11 recessive bits before joining the bus.&lt;/P&gt;
&lt;P style="font-weight: 400;"&gt;In automatic Bus-off recovery mode the behavior is the same, you just do not clear BOFF_REC, soo… after 128 sequences of 11 recessive bits occurred, then FlexCAN will resynchronize to the bus by waiting for 11 recessive bits before joining the bus.&lt;/P&gt;
&lt;P style="font-weight: 400;"&gt;&lt;SPAN&gt;You can also refer to this FlexCAN error test example:&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K144-FlexCAN-TX-RX-Error-ISR-test-S32DS2-2/ta-p/1278224" target="_blank"&gt;Example S32K144 FlexCAN TX/RX/Error ISR test S32DS2.2 - NXP Community&lt;/A&gt;&lt;SPAN&gt;. Simply&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;short CANH with GND and send message using either SW1 or SW2, FlexCAN enters bus off (error event)&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="font-weight: 400;"&gt;&lt;SPAN&gt;BR, Petr&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Thu, 14 May 2026 08:13:59 GMT</pubDate>
    <dc:creator>PetrS</dc:creator>
    <dc:date>2026-05-14T08:13:59Z</dc:date>
    <item>
      <title>BUSOFF</title>
      <link>https://community.nxp.com/t5/S32K/BUSOFF/m-p/2365189#M58570</link>
      <description>&lt;P&gt;S32K144怎么实现BUSOFF的快慢恢复&lt;/P&gt;</description>
      <pubDate>Thu, 14 May 2026 02:54:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/BUSOFF/m-p/2365189#M58570</guid>
      <dc:creator>LY_K</dc:creator>
      <dc:date>2026-05-14T02:54:10Z</dc:date>
    </item>
    <item>
      <title>Re: BUSOFF</title>
      <link>https://community.nxp.com/t5/S32K/BUSOFF/m-p/2365330#M58582</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P style="font-weight: 400;"&gt;FlexCAN implements 2 ways of bus off recovery, depending of CTRL1[BOFFREC] setting: &lt;BR /&gt;0b - Automatic recovering from Bus Off state enabled.&lt;BR /&gt;1b - Automatic recovering from Bus Off state disabled.&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;
&lt;P style="font-weight: 400;"&gt;In case the automatic recovery mode is disabled, BOFF_REC = 1, the recovery from bus-off starts after both independent events have become true:&lt;/P&gt;
&lt;UL style="font-weight: 400;"&gt;
&lt;LI&gt;128 occurrences of 11 consecutive recessive bits on the CAN bus have been monitored&lt;/LI&gt;
&lt;LI&gt;BOFF_REC&amp;nbsp; has been cleared by the user&lt;/LI&gt;
&lt;/UL&gt;
&lt;P style="font-weight: 400;"&gt;So if negation happens&lt;/P&gt;
&lt;P style="font-weight: 400;"&gt;- before 128 sequences of 11 recessive bits are detected on the CAN bus, then Bus Off recovery happens in similar way as in automatic recovery mode.&lt;/P&gt;
&lt;P style="font-weight: 400;"&gt;- after 128 sequences of 11 recessive bits occurred, then FlexCAN will resynchronize to the bus by waiting for 11 recessive bits before joining the bus.&lt;/P&gt;
&lt;P style="font-weight: 400;"&gt;In automatic Bus-off recovery mode the behavior is the same, you just do not clear BOFF_REC, soo… after 128 sequences of 11 recessive bits occurred, then FlexCAN will resynchronize to the bus by waiting for 11 recessive bits before joining the bus.&lt;/P&gt;
&lt;P style="font-weight: 400;"&gt;&lt;SPAN&gt;You can also refer to this FlexCAN error test example:&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K144-FlexCAN-TX-RX-Error-ISR-test-S32DS2-2/ta-p/1278224" target="_blank"&gt;Example S32K144 FlexCAN TX/RX/Error ISR test S32DS2.2 - NXP Community&lt;/A&gt;&lt;SPAN&gt;. Simply&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;short CANH with GND and send message using either SW1 or SW2, FlexCAN enters bus off (error event)&lt;/SPAN&gt;&lt;/P&gt;
&lt;P style="font-weight: 400;"&gt;&lt;SPAN&gt;BR, Petr&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 14 May 2026 08:13:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/BUSOFF/m-p/2365330#M58582</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2026-05-14T08:13:59Z</dc:date>
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