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    <title>S32KのトピックRe: S32K3_LIN_DMA Mode_BUG</title>
    <link>https://community.nxp.com/t5/S32K/S32K3-LIN-DMA-Mode-BUG/m-p/2362365#M58435</link>
    <description>&lt;P&gt;Hi,&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/160001"&gt;@danielmartynek&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;Thank you for your reply. I studied his implementation logic. He separates the frame header and data of the LIN received message. The frame header is received using interrupts, and the data is processed and received in UART's DMA mode; similarly, it should also be no problem to use UART's DMA for data transmission.&lt;BR /&gt;Since high-frequency LIN interrupt processing may affect OS scheduling, it seems that for now we can only implement the LIN TX DMA mode ourselves.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="image.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/384771iBFFDE5525D4710F3/image-size/large?v=v2&amp;amp;px=999" role="button" title="image.png" alt="image.png" /&gt;&lt;/span&gt;&lt;BR /&gt;Best Regards,&lt;BR /&gt;xianlong&lt;/P&gt;</description>
    <pubDate>Fri, 08 May 2026 08:34:33 GMT</pubDate>
    <dc:creator>wuxianlong</dc:creator>
    <dc:date>2026-05-08T08:34:33Z</dc:date>
    <item>
      <title>S32K3_LIN_DMA Mode_BUG</title>
      <link>https://community.nxp.com/t5/S32K/S32K3-LIN-DMA-Mode-BUG/m-p/2355783#M58168</link>
      <description>&lt;P&gt;Hi,NXP&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;DIV class=""&gt;Phenomenon: When the LIN data segment is 8 bytes, checksum failure occurs in LIN's DMA mode.&lt;/DIV&gt;&lt;DIV class=""&gt;Cause: There may be a BUG in NXP's design. When designing the data reception buffer Lpuart_Lin_Ip_au8SduBuffer, only the data segment was considered. However, in fact, the underlying code's DMA reception needs to receive both the data segment and the checksum segment, and use Lpuart_Lin_Ip_au8SduBuffer for checksum. Since Lpuart_Lin_Ip_au8SduBuffer is designed as an 8-byte array, when the LIN data field has 8 bytes of data, the ninth byte (checksum segment) cannot be received, and the data checksum will fail.&lt;/DIV&gt;&lt;DIV class=""&gt;This bug still exists in RTD6.0.0 and RTD7.0.0.&lt;/DIV&gt;&lt;DIV class=""&gt;Incidentally, currently there is only RX mode for LIN's DMA. Are there any plans for TX mode?&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="image.png" style="width: 958px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/383477i225A5CF2B3EB955B/image-size/large?v=v2&amp;amp;px=999" role="button" title="image.png" alt="image.png" /&gt;&lt;/span&gt;&lt;BR /&gt;&lt;P&gt;&lt;SPAN&gt;Solution. Modify the size of Lpuart_Lin_Ip_au8SduBuffer, that is, change the underlying macro definition LPUART_LIN_IP_MAX_DATA_LENGTH_U8 from 8 to 9.&lt;BR /&gt;&lt;BR /&gt;Best Regards,&lt;BR /&gt;xianlong&lt;/SPAN&gt;&lt;/P&gt;&lt;/DIV&gt;</description>
      <pubDate>Fri, 24 Apr 2026 10:12:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3-LIN-DMA-Mode-BUG/m-p/2355783#M58168</guid>
      <dc:creator>wuxianlong</dc:creator>
      <dc:date>2026-04-24T10:12:15Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3_LIN_DMA Mode_BUG</title>
      <link>https://community.nxp.com/t5/S32K/S32K3-LIN-DMA-Mode-BUG/m-p/2360066#M58345</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/191389"&gt;@wuxianlong&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Thank you for bringing this to our attention.&lt;BR /&gt;This issue has been confirmed as a bug and will be fixed in a future release.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR, Daniel&lt;/P&gt;</description>
      <pubDate>Mon, 04 May 2026 12:24:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3-LIN-DMA-Mode-BUG/m-p/2360066#M58345</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2026-05-04T12:24:38Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3_LIN_DMA Mode_BUG</title>
      <link>https://community.nxp.com/t5/S32K/S32K3-LIN-DMA-Mode-BUG/m-p/2360741#M58374</link>
      <description>Are there any plans for TX mode?&lt;BR /&gt;</description>
      <pubDate>Wed, 06 May 2026 01:13:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3-LIN-DMA-Mode-BUG/m-p/2360741#M58374</guid>
      <dc:creator>wuxianlong</dc:creator>
      <dc:date>2026-05-06T01:13:38Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3_LIN_DMA Mode_BUG</title>
      <link>https://community.nxp.com/t5/S32K/S32K3-LIN-DMA-Mode-BUG/m-p/2361803#M58420</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/191389"&gt;@wuxianlong&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;I received feedback from the SW team. The driver would need to verify each byte after transmission, which DMA cannot handle. Therefore, only interrupt mode is supported for TX.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 07 May 2026 09:46:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3-LIN-DMA-Mode-BUG/m-p/2361803#M58420</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2026-05-07T09:46:35Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3_LIN_DMA Mode_BUG</title>
      <link>https://community.nxp.com/t5/S32K/S32K3-LIN-DMA-Mode-BUG/m-p/2362365#M58435</link>
      <description>&lt;P&gt;Hi,&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/160001"&gt;@danielmartynek&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;Thank you for your reply. I studied his implementation logic. He separates the frame header and data of the LIN received message. The frame header is received using interrupts, and the data is processed and received in UART's DMA mode; similarly, it should also be no problem to use UART's DMA for data transmission.&lt;BR /&gt;Since high-frequency LIN interrupt processing may affect OS scheduling, it seems that for now we can only implement the LIN TX DMA mode ourselves.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="image.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/384771iBFFDE5525D4710F3/image-size/large?v=v2&amp;amp;px=999" role="button" title="image.png" alt="image.png" /&gt;&lt;/span&gt;&lt;BR /&gt;Best Regards,&lt;BR /&gt;xianlong&lt;/P&gt;</description>
      <pubDate>Fri, 08 May 2026 08:34:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3-LIN-DMA-Mode-BUG/m-p/2362365#M58435</guid>
      <dc:creator>wuxianlong</dc:creator>
      <dc:date>2026-05-08T08:34:33Z</dc:date>
    </item>
    <item>
      <title>Re: S32K3_LIN_DMA Mode_BUG</title>
      <link>https://community.nxp.com/t5/S32K/S32K3-LIN-DMA-Mode-BUG/m-p/2363794#M58507</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/191389"&gt;@wuxianlong&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;I have nothing to add here.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The RTD team has confirmed that there is no plan to add the functionality anyways.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 12 May 2026 07:06:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K3-LIN-DMA-Mode-BUG/m-p/2363794#M58507</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2026-05-12T07:06:10Z</dc:date>
    </item>
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