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    <title>topic Re: RDBESSK358BMU Ethernet configuration in S32K</title>
    <link>https://community.nxp.com/t5/S32K/RDBESSK358BMU-Ethernet-configuration/m-p/2355789#M58170</link>
    <description>&lt;P&gt;Thank you very much&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/233505"&gt;@PavelL&lt;/a&gt;! I noticed i still had 100m as GMAC speed, by setting it to 1G to match 125MHz clock now it works fine with ping and TCP echo on port 7!&lt;/P&gt;&lt;P&gt;I also commented "Eth_T_InitPhys();" since my PHY was not in the phy list and it is configured via straps.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Screenshot 2026-04-24 121606.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/383478i7F0803F13F5A9209/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Screenshot 2026-04-24 121606.png" alt="Screenshot 2026-04-24 121606.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt; &lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Screenshot 2026-04-24 121640.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/383479i2A529C8724B42B67/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Screenshot 2026-04-24 121640.png" alt="Screenshot 2026-04-24 121640.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt; &lt;/P&gt;</description>
    <pubDate>Fri, 24 Apr 2026 10:18:57 GMT</pubDate>
    <dc:creator>gferretts</dc:creator>
    <dc:date>2026-04-24T10:18:57Z</dc:date>
    <item>
      <title>RDBESSK358BMU Ethernet configuration</title>
      <link>https://community.nxp.com/t5/S32K/RDBESSK358BMU-Ethernet-configuration/m-p/2354614#M58115</link>
      <description>&lt;P&gt;I'm currently working on RDBESSK358BMU from NXP, the board has S32K358 with GMAC connected to Marvell Alaska 88e1510 transceiver and a eth gigabit port (HW scheme attached).&lt;/P&gt;&lt;P&gt;I'm wondering if i can use tcpip stack with lwip_baremetal examples with this configuration.&lt;/P&gt;&lt;P&gt;The example with Gmac_Loopback works, butlwip_baremetal_example fails on Gmac_initDMA like i saw in other posts it is a clock reference problem, but the board i'm using has an external clock on it, so i don't understand how to adapt the example to my hardware. Can someone give help? Thanks!&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Screenshot 2026-04-22 103818.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/383172i89DEBF3D64EE4CF6/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Screenshot 2026-04-22 103818.png" alt="Screenshot 2026-04-22 103818.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt; &lt;/P&gt;</description>
      <pubDate>Wed, 22 Apr 2026 08:53:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/RDBESSK358BMU-Ethernet-configuration/m-p/2354614#M58115</guid>
      <dc:creator>gferretts</dc:creator>
      <dc:date>2026-04-22T08:53:54Z</dc:date>
    </item>
    <item>
      <title>Re: RDBESSK358BMU Ethernet configuration</title>
      <link>https://community.nxp.com/t5/S32K/RDBESSK358BMU-Ethernet-configuration/m-p/2355696#M58162</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/260147"&gt;@gferretts&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;I apologize for delayed reply.&lt;/P&gt;
&lt;P&gt;Unfortunately,&amp;nbsp;RD-BESSK358BMU is not in&amp;nbsp; my possession, so I'm not able to adapt lwip example for you. Anyway, I adapted lwip example for&amp;nbsp;S32K358EVB-Q289, RGMII 100Mbps without any issues. Let me share basic steps I use for adoption (please note that some details might be related to S32K3 RTD / TCPIP version):&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Config Tool - Pins
&lt;UL&gt;
&lt;LI&gt;Adopting pins to fit board's wiring&lt;/LI&gt;
&lt;LI&gt;Set Slew rate as Fastest settings, if applicable&lt;/LI&gt;
&lt;LI&gt;TX_CLK should be output for RGMII&lt;/LI&gt;
&lt;/UL&gt;
&lt;/LI&gt;
&lt;LI&gt;Config Tool - Clocks
&lt;UL&gt;
&lt;LI&gt;GMAC clocks should look like that (note for GMAC 1Gbps: 25MHz -&amp;gt; 125MHz ; 50MHz -&amp;gt; 250MHz)&lt;/LI&gt;
&lt;/UL&gt;
&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="PavelL_0-1777015189023.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/383445i246B6EC68DC45A5A/image-size/medium?v=v2&amp;amp;px=400" role="button" title="PavelL_0-1777015189023.png" alt="PavelL_0-1777015189023.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Config Tool - GMAC driver
&lt;UL&gt;
&lt;LI&gt;ETH_MAC_LAYE_TYPE_XGMII, REDUCED, set correct speed ETH_MAC_LAYER_SPEED_xxx&lt;/LI&gt;
&lt;/UL&gt;
&lt;/LI&gt;
&lt;LI&gt;Source code - device.c
&lt;UL&gt;
&lt;LI&gt;Add RTD workaround as the very first rows of device_init()&lt;/LI&gt;
&lt;/UL&gt;
&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;/* Set RGMII mode configuration for GMAC0 in DCM module */&lt;BR /&gt;IP_DCM_GPR-&amp;gt;DCMRWF1 |= DCM_GPR_DCMRWF1_MAC_CONF_SEL(0x01) | DCM_GPR_DCMRWF1_MAC_TX_RMII_CLK_LPBCK_EN_MASK;&lt;BR /&gt;/* Set RGMII RX_CLK arrives directly from the RX_CLK pin for GMAC in DCM module */&lt;BR /&gt;IP_DCM_GPR-&amp;gt;DCMRWF3 |= DCM_GPR_DCMRWF3_MAC_RX_CLK_MUX_BYPASS(0x01);&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Source code - test.c
&lt;UL&gt;
&lt;LI&gt;Alternatively, comment out section which shuts down TCP/IP stack after some time&lt;/LI&gt;
&lt;/UL&gt;
&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;This was the easier part.&lt;/P&gt;
&lt;P&gt;Looking to schematic, you need to define GPIO PTC1 to provide valid reset pulse signal to the PHY and wait for a while before initializing GMAC. PHY usually works independently, in unmanaged mode, just configured by pin strapping. Sometimes, PHY requires management via SMI.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;What S32K3 RTD version and what TCP/IP stack version do you use?&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Pavel&lt;/P&gt;</description>
      <pubDate>Fri, 24 Apr 2026 07:50:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/RDBESSK358BMU-Ethernet-configuration/m-p/2355696#M58162</guid>
      <dc:creator>PavelL</dc:creator>
      <dc:date>2026-04-24T07:50:43Z</dc:date>
    </item>
    <item>
      <title>Re: RDBESSK358BMU Ethernet configuration</title>
      <link>https://community.nxp.com/t5/S32K/RDBESSK358BMU-Ethernet-configuration/m-p/2355772#M58167</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/233505"&gt;@PavelL&lt;/a&gt; , thanks for your reply. I'm still having problems with lwip, i also have s32k3x8evb-q289 but i don't have a TJA daughter board so i need to test Ethernet on my S32K358BMU.&lt;/P&gt;&lt;P&gt;I'm using RTD3.0.0 with "TCPIP STACK 1.0.3 D2306", i attach my .mex config file where i tryied to replicate what you showed (clock configuration, GMAC pheripheral and pinout) and "device.c" with ETH_RESET from pin.&lt;/P&gt;&lt;P&gt;I tryied also to replicate your RTD turnaround manually since my rtd has no loopback define:&lt;/P&gt;&lt;DIV&gt;void device_init(void) {&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;uint16 pitPeriod;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Set RMII configuration for EMAC in DCM module */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;//IP_DCM_GPR-&amp;gt;DCMRWF1 = (IP_DCM_GPR-&amp;gt;DCMRWF1 &amp;amp; ~DCM_GPR_DCMRWF1_EMAC_CONF_SEL_MASK) | DCM_GPR_DCMRWF1_EMAC_CONF_SEL(1U);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;/* Manual RTD turnaround */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;IP_DCM_GPR-&amp;gt;DCMRWF1 = 0x80000040;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;IP_DCM_GPR-&amp;gt;DCMRWF3 = 0x2000;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;....&lt;/SPAN&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;With this configuration, the example is able to achieve Gmac_Ip_InitDMA without Timeout and reaches mainloop, but pinging 192.168.0.200 from my Pc results in not reachable host and ping timeout.&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;With oscilloscope i verified RXC is present (25MHz when Phy negotiates 100Mbps or 125MHz when 1Gbps) so there is some traffic coming from ETH port. Meanwhile on TXC now i see 125MHz too but TXD0,1 are never triggered.&lt;/DIV&gt;&lt;DIV&gt;I hope you can find what is happening wrong here.&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;</description>
      <pubDate>Fri, 24 Apr 2026 10:01:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/RDBESSK358BMU-Ethernet-configuration/m-p/2355772#M58167</guid>
      <dc:creator>gferretts</dc:creator>
      <dc:date>2026-04-24T10:01:11Z</dc:date>
    </item>
    <item>
      <title>Re: RDBESSK358BMU Ethernet configuration</title>
      <link>https://community.nxp.com/t5/S32K/RDBESSK358BMU-Ethernet-configuration/m-p/2355789#M58170</link>
      <description>&lt;P&gt;Thank you very much&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/233505"&gt;@PavelL&lt;/a&gt;! I noticed i still had 100m as GMAC speed, by setting it to 1G to match 125MHz clock now it works fine with ping and TCP echo on port 7!&lt;/P&gt;&lt;P&gt;I also commented "Eth_T_InitPhys();" since my PHY was not in the phy list and it is configured via straps.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Screenshot 2026-04-24 121606.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/383478i7F0803F13F5A9209/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Screenshot 2026-04-24 121606.png" alt="Screenshot 2026-04-24 121606.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt; &lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Screenshot 2026-04-24 121640.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/383479i2A529C8724B42B67/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Screenshot 2026-04-24 121640.png" alt="Screenshot 2026-04-24 121640.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt; &lt;/P&gt;</description>
      <pubDate>Fri, 24 Apr 2026 10:18:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/RDBESSK358BMU-Ethernet-configuration/m-p/2355789#M58170</guid>
      <dc:creator>gferretts</dc:creator>
      <dc:date>2026-04-24T10:18:57Z</dc:date>
    </item>
    <item>
      <title>Re: RDBESSK358BMU Ethernet configuration</title>
      <link>https://community.nxp.com/t5/S32K/RDBESSK358BMU-Ethernet-configuration/m-p/2355795#M58173</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/260147"&gt;@gferretts&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;yes, that's what I have found. You were faster.&lt;/P&gt;
&lt;P&gt;You may copy missing definition from RTD 5.0.0:&lt;BR /&gt;#define DCM_GPR_DCMRWF1_MAC_TX_RMII_CLK_LPBCK_EN_MASK (0x80000000U)&lt;BR /&gt;#define DCM_GPR_DCMRWF1_MAC_TX_RMII_CLK_LPBCK_EN_SHIFT (31U)&lt;BR /&gt;#define DCM_GPR_DCMRWF1_MAC_TX_RMII_CLK_LPBCK_EN_WIDTH (1U)&lt;BR /&gt;#define DCM_GPR_DCMRWF1_MAC_TX_RMII_CLK_LPBCK_EN(x) (((uint32_t)(((uint32_t)(x)) &amp;lt;&amp;lt; DCM_GPR_DCMRWF1_MAC_TX_RMII_CLK_LPBCK_EN_SHIFT)) &amp;amp; DCM_GPR_DCMRWF1_MAC_TX_RMII_CLK_LPBCK_EN_MASK)&lt;/P&gt;
&lt;P&gt;... just notice that the RTD workaround uses |=&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regarding Eth_T_InitPhys() - yes, that was also right mode - this routine deserves a deep inspection.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Pavel&lt;/P&gt;</description>
      <pubDate>Fri, 24 Apr 2026 10:34:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/RDBESSK358BMU-Ethernet-configuration/m-p/2355795#M58173</guid>
      <dc:creator>PavelL</dc:creator>
      <dc:date>2026-04-24T10:34:11Z</dc:date>
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