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    <title>topic Re: SJA1105 Configuration in S32K</title>
    <link>https://community.nxp.com/t5/S32K/SJA1105-Configuration/m-p/2355262#M58148</link>
    <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/256141"&gt;@jianghao&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;I think there is a small terminology mix-up here regarding Auto‑Negotiation vs. RGMII interface clocking.&lt;/P&gt;
&lt;P&gt;Auto‑Negotiation is not a function of RGMII.&amp;nbsp;RGMII is just the parallel MAC↔MAC / MAC↔PHY interface (data + source‑synchronous clocks). The link partner “Auto‑Negotiation” (speed/duplex capability exchange) happens on the PHY line side (e.g., 100BASE‑TX / 1000BASE‑T / 100BASE‑T1 etc.), not on the RGMII pins. In other words, S32K344 EMAC and SJA1105 do not “negotiate” speed over RGMII in the way SGMII/PCS-based links can.&lt;/P&gt;
&lt;P&gt;The SJA1105 is an SPI-managed switch; you must load a static configuration after reset/power-up, and this configuration defines per-port interface mode and operational parameters. The typical software model is “configure and keep,” with only limited dynamic updates at runtime.&lt;/P&gt;
&lt;P&gt;If your S32K344 EMAC ↔ SJA1105 connection is a MAC‑to‑MAC (PHY-less) RGMII link, the usual approach is to treat it as a fixed link and keep it at a chosen speed (S32K344 EMAC doesn't support 1Gbps).&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Pavel&lt;/P&gt;</description>
    <pubDate>Thu, 23 Apr 2026 14:04:16 GMT</pubDate>
    <dc:creator>PavelL</dc:creator>
    <dc:date>2026-04-23T14:04:16Z</dc:date>
    <item>
      <title>SJA1105 Configuration</title>
      <link>https://community.nxp.com/t5/S32K/SJA1105-Configuration/m-p/2353659#M58077</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Using the GMAC interface of S32K344 to connect with SJA1105, according to the manual, after enabling the auto-negotiation function on the RGMII port, and then sending a complete "static configuration table" to SJA1105 via the SPI interface, it is possible to adaptively obtain the actual 2.5/25/125 MHz clocks required by the RGMII port. Thus, it is possible to adaptively determine whether manual dynamic clock frequency division is needed to obtain 125 MHz/25 MHz/2.5 MHz clocks?&lt;/SPAN&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="image.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/382951iDCAD666FFCA300D1/image-size/large?v=v2&amp;amp;px=999" role="button" title="image.png" alt="image.png" /&gt;&lt;/span&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 20 Apr 2026 11:02:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/SJA1105-Configuration/m-p/2353659#M58077</guid>
      <dc:creator>jianghao</dc:creator>
      <dc:date>2026-04-20T11:02:03Z</dc:date>
    </item>
    <item>
      <title>Re: SJA1105 Configuration</title>
      <link>https://community.nxp.com/t5/S32K/SJA1105-Configuration/m-p/2355262#M58148</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/256141"&gt;@jianghao&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;I think there is a small terminology mix-up here regarding Auto‑Negotiation vs. RGMII interface clocking.&lt;/P&gt;
&lt;P&gt;Auto‑Negotiation is not a function of RGMII.&amp;nbsp;RGMII is just the parallel MAC↔MAC / MAC↔PHY interface (data + source‑synchronous clocks). The link partner “Auto‑Negotiation” (speed/duplex capability exchange) happens on the PHY line side (e.g., 100BASE‑TX / 1000BASE‑T / 100BASE‑T1 etc.), not on the RGMII pins. In other words, S32K344 EMAC and SJA1105 do not “negotiate” speed over RGMII in the way SGMII/PCS-based links can.&lt;/P&gt;
&lt;P&gt;The SJA1105 is an SPI-managed switch; you must load a static configuration after reset/power-up, and this configuration defines per-port interface mode and operational parameters. The typical software model is “configure and keep,” with only limited dynamic updates at runtime.&lt;/P&gt;
&lt;P&gt;If your S32K344 EMAC ↔ SJA1105 connection is a MAC‑to‑MAC (PHY-less) RGMII link, the usual approach is to treat it as a fixed link and keep it at a chosen speed (S32K344 EMAC doesn't support 1Gbps).&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Pavel&lt;/P&gt;</description>
      <pubDate>Thu, 23 Apr 2026 14:04:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/SJA1105-Configuration/m-p/2355262#M58148</guid>
      <dc:creator>PavelL</dc:creator>
      <dc:date>2026-04-23T14:04:16Z</dc:date>
    </item>
    <item>
      <title>Re: SJA1105 Configuration</title>
      <link>https://community.nxp.com/t5/S32K/SJA1105-Configuration/m-p/2355784#M58169</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/233505"&gt;@PavelL&lt;/a&gt;&amp;nbsp;Thanks, I understand.&lt;/P&gt;</description>
      <pubDate>Fri, 24 Apr 2026 10:14:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/SJA1105-Configuration/m-p/2355784#M58169</guid>
      <dc:creator>jianghao</dc:creator>
      <dc:date>2026-04-24T10:14:39Z</dc:date>
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