s32k314 spi clock and mode

rlaxortn — Sun, 05 Apr 2026 23:26:20 GMT

hello.

i am using s32ds RTD4.0.0 and s32k314.

and i am developing spi communication.

i test work well spi mode1,2 (cpol 0, cpha 1 / cpol0, cpha 0).

this modes work well.

but i should use spi mode 3 and it does not work well. data has crack.

so i check clock.

spi clock.

so before clock start, that has weird clock.

why s32k314 make that? every modes are same.

Fortunately, Modes 1 and 2 are read because their clock idle state is 0. However, Modes 3 and 4 are read when their clock idle state is 1, so a problem occurs due to the clock in that photo.

1. How can I get rid of that noise before the clock starts?

2. I am using PS0 for SPI communication. However, to receive data from the SPI-enabled IC chip, I need to set the CS (Critical State) to low via GPIO to receive 4 bytes to determine the data length, and then maintain the CS to receive data up to that length. Currently, I am receiving data by controlling the CS via GPIO as shown in the picture (for example only). Please let me know if there is a way to achieve this functionality by assigning it to PS0.

Note: SPI communication modes 1 and 2 work well, but modes 3 and 4 do not function properly. (Interesting data is inserted due to the clock.)

thank to help.

Re: s32k314 spi clock and mode

Senlent — Tue, 07 Apr 2026 08:22:47 GMT

Hi@rlaxortn

1.Regarding your first question, the clock is pulled low at the beginning, which is similar to a known issue description.

You can try modifying it as follows:

2.Regarding your second question, I don't understand why you didn't send the entire length of 4 + 19 = 23 bits at once, instead of sending 4 and 19 bytes separately.

topic s32k314 spi clock and mode in S32K

s32k314 spi clock and mode

Re: s32k314 spi clock and mode