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    <title>topic TCM Backdoor-Addressing on same core [S32K3] in S32K</title>
    <link>https://community.nxp.com/t5/S32K/TCM-Backdoor-Addressing-on-same-core-S32K3/m-p/2339842#M57547</link>
    <description>&lt;P&gt;Hi NXP-Team,&lt;/P&gt;&lt;P&gt;concerning your TCM-Ram (TightlyCoupledMemory) Regions defined in your MemoryMap available on the S32K388 Controller:&lt;BR /&gt;The Memory Map shows that all of these (whether ITCM or DTCM) are located at the same address respectively (see attached screenshot).&lt;BR /&gt;&lt;BR /&gt;1) Can you clarify if addressing a TCM from its local core via the backdoor address leads to performance loss? (.e.g. Core0 accessing ITCM0 at 0x11000000 instead of 0x0)&lt;BR /&gt;1.1) If yes: How much loss is expected?&lt;BR /&gt;&lt;BR /&gt;In my project we are using GNU Style LD-Files (GHS).&amp;nbsp;&lt;BR /&gt;2) Is there a way to address (via sections in LD File) the TCMs exclusively for same core access&amp;nbsp;&lt;SPAN&gt;unambiguously&lt;/SPAN&gt; in a single LD File?&lt;BR /&gt;&lt;BR /&gt;Thanks&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Best Regards&lt;BR /&gt;Daimon&lt;/P&gt;</description>
    <pubDate>Thu, 26 Mar 2026 07:35:48 GMT</pubDate>
    <dc:creator>Daimon</dc:creator>
    <dc:date>2026-03-26T07:35:48Z</dc:date>
    <item>
      <title>TCM Backdoor-Addressing on same core [S32K3]</title>
      <link>https://community.nxp.com/t5/S32K/TCM-Backdoor-Addressing-on-same-core-S32K3/m-p/2339842#M57547</link>
      <description>&lt;P&gt;Hi NXP-Team,&lt;/P&gt;&lt;P&gt;concerning your TCM-Ram (TightlyCoupledMemory) Regions defined in your MemoryMap available on the S32K388 Controller:&lt;BR /&gt;The Memory Map shows that all of these (whether ITCM or DTCM) are located at the same address respectively (see attached screenshot).&lt;BR /&gt;&lt;BR /&gt;1) Can you clarify if addressing a TCM from its local core via the backdoor address leads to performance loss? (.e.g. Core0 accessing ITCM0 at 0x11000000 instead of 0x0)&lt;BR /&gt;1.1) If yes: How much loss is expected?&lt;BR /&gt;&lt;BR /&gt;In my project we are using GNU Style LD-Files (GHS).&amp;nbsp;&lt;BR /&gt;2) Is there a way to address (via sections in LD File) the TCMs exclusively for same core access&amp;nbsp;&lt;SPAN&gt;unambiguously&lt;/SPAN&gt; in a single LD File?&lt;BR /&gt;&lt;BR /&gt;Thanks&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;Best Regards&lt;BR /&gt;Daimon&lt;/P&gt;</description>
      <pubDate>Thu, 26 Mar 2026 07:35:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TCM-Backdoor-Addressing-on-same-core-S32K3/m-p/2339842#M57547</guid>
      <dc:creator>Daimon</dc:creator>
      <dc:date>2026-03-26T07:35:48Z</dc:date>
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    <item>
      <title>Re: TCM Backdoor-Addressing on same core [S32K3]</title>
      <link>https://community.nxp.com/t5/S32K/TCM-Backdoor-Addressing-on-same-core-S32K3/m-p/2340347#M57551</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;BLOCKQUOTE&gt;
&lt;P&gt;1) Can you clarify if addressing a TCM from its local core via the backdoor address leads to performance loss?&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;P&gt;YES — backdoor access is slower.&lt;/P&gt;
&lt;P&gt;Because the backdoor accesses the TCM via the System Bus, it is subject to arbitration with other masters trying to access the same memory, which can introduce variable delays.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.google.com/url?sa=t&amp;amp;source=web&amp;amp;rct=j&amp;amp;opi=89978449&amp;amp;url=https://community.nxp.com/pwmxy87654/attachments/pwmxy87654/S32K/37044/2/AN13388.pdf&amp;amp;ved=2ahUKEwjWkKP2y72TAxVKGxAIHbIPJw4QFnoECBsQAQ&amp;amp;usg=AOvVaw2h6Jr5jGQ0YIaWHT5lFRud" target="_self"&gt;AN13388&lt;/A&gt;&amp;nbsp;&lt;/P&gt;
&lt;BLOCKQUOTE&gt;
&lt;P&gt;1.1) If yes: How much loss is expected?&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;P&gt;We do nothave published cycle‑accurate numbers for backdoor TCM performance on S32K3&lt;/P&gt;
&lt;P&gt;I can only reason based on the M7 architecture:&lt;/P&gt;
&lt;P&gt;Architectural expectation: ~4–6× slower for typical code fetch or load/store.&lt;/P&gt;
&lt;BLOCKQUOTE&gt;
&lt;P&gt;2) Is there a way to address (via sections in LD File) the TCMs exclusively for same core access unambiguously in a single LD File?&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;P&gt;Yes — as long as each TCM’s direct addresses are unique per core.&lt;/P&gt;
&lt;P&gt;On S32K388, each core has its own ITCM and DTCM direct address region.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Peter&lt;/P&gt;</description>
      <pubDate>Thu, 26 Mar 2026 12:53:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TCM-Backdoor-Addressing-on-same-core-S32K3/m-p/2340347#M57551</guid>
      <dc:creator>petervlna</dc:creator>
      <dc:date>2026-03-26T12:53:29Z</dc:date>
    </item>
    <item>
      <title>Re: TCM Backdoor-Addressing on same core [S32K3]</title>
      <link>https://community.nxp.com/t5/S32K/TCM-Backdoor-Addressing-on-same-core-S32K3/m-p/2340808#M57574</link>
      <description>&lt;P&gt;Hello Peter,&lt;BR /&gt;thanks for the answer - this magnitude estimation is sufficient for me (but too high for my usecase).&lt;/P&gt;&lt;P&gt;concerning the direct address region - in case of ITCM: are you talking about 0x0 - 0xFFFF?&lt;BR /&gt;Is there a unique address available to differentiate between them, that does not map to the backdoor path?&lt;BR /&gt;&lt;FONT&gt;In Code addressing them is no problem, but If I want to create dedicated sections in my LD File and place objects there the addresses are &lt;/FONT&gt;ambiguous.&lt;BR /&gt;Is there a path forward to handle that?&lt;BR /&gt;&lt;BR /&gt;Thanks!&lt;BR /&gt;&lt;BR /&gt;Best Regards,&lt;BR /&gt;Daimon&lt;/P&gt;</description>
      <pubDate>Fri, 27 Mar 2026 06:51:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/TCM-Backdoor-Addressing-on-same-core-S32K3/m-p/2340808#M57574</guid>
      <dc:creator>Daimon</dc:creator>
      <dc:date>2026-03-27T06:51:27Z</dc:date>
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