<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S32KのトピックRe: Watermark DMA Enable Issue</title>
    <link>https://community.nxp.com/t5/S32K/Watermark-DMA-Enable-Issue/m-p/2331480#M57295</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;it looks like DMA and/or DMA TCD ch clocks are gated off. Check it within Mcu component (McuModuleConfiguration-&amp;gt;McuModeSettingConf-&amp;gt;McuPeripheral).&lt;/P&gt;
&lt;P&gt;Then chapter&amp;nbsp;3.6.3.3 BCTU Software Trigger with DMA Data Transfer of the ADC driver manual gives you necessary configuration&amp;nbsp;to do a conversion data transfer from BCTU FIFO&lt;BR /&gt;to user buffer using DMA.&lt;/P&gt;
&lt;P&gt;BR, Petr&lt;/P&gt;</description>
    <pubDate>Thu, 12 Mar 2026 12:15:09 GMT</pubDate>
    <dc:creator>PetrS</dc:creator>
    <dc:date>2026-03-12T12:15:09Z</dc:date>
    <item>
      <title>Watermark DMA Enable Issue</title>
      <link>https://community.nxp.com/t5/S32K/Watermark-DMA-Enable-Issue/m-p/2329474#M57218</link>
      <description>&lt;P&gt;So, I plan to use the BCTU FIFO method to transfer the ADC data in the LIST. Currently, it has been executing: Bctu_Ip_Init(0, &amp;amp;BctuIpConfigControlMode_0); Enter hard fault.&lt;span class="lia-inline-image-display-wrapper lia-image-align-center" image-alt="1.png" style="width: 856px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/378798iBAA70C2A5209F467/image-size/large?v=v2&amp;amp;px=999" role="button" title="1.png" alt="1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;This is about the configuration of FIFO and DMA.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="2.png" style="width: 637px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/378799iF4BFC88F8E4D6094/image-size/large?v=v2&amp;amp;px=999" role="button" title="2.png" alt="2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="3.png" style="width: 686px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/378800i40CC0D423FD5AFCE/image-size/large?v=v2&amp;amp;px=999" role="button" title="3.png" alt="3.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;When the Watermark DMA enable is turned off, the program does not have any errors and will not enter a hard fault. Please help me figure out what exactly is causing this issue where it gets stuck at the BCTU initialization stage. Thank you very much!&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 10 Mar 2026 07:39:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Watermark-DMA-Enable-Issue/m-p/2329474#M57218</guid>
      <dc:creator>xingyun</dc:creator>
      <dc:date>2026-03-10T07:39:11Z</dc:date>
    </item>
    <item>
      <title>回复： Watermark DMA Enable Issue</title>
      <link>https://community.nxp.com/t5/S32K/Watermark-DMA-Enable-Issue/m-p/2329481#M57222</link>
      <description>&lt;P&gt;One more question I have is about how to handle the ADC data. Is it done through BCTU_0_FIFO_1_WatermarkNotification? Or perhaps I could set up a DMA interrupt, and use this interrupt to handle the data I want or perform other functions I desire.&lt;/P&gt;</description>
      <pubDate>Tue, 10 Mar 2026 07:49:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Watermark-DMA-Enable-Issue/m-p/2329481#M57222</guid>
      <dc:creator>xingyun</dc:creator>
      <dc:date>2026-03-10T07:49:27Z</dc:date>
    </item>
    <item>
      <title>Re: Watermark DMA Enable Issue</title>
      <link>https://community.nxp.com/t5/S32K/Watermark-DMA-Enable-Issue/m-p/2331480#M57295</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;it looks like DMA and/or DMA TCD ch clocks are gated off. Check it within Mcu component (McuModuleConfiguration-&amp;gt;McuModeSettingConf-&amp;gt;McuPeripheral).&lt;/P&gt;
&lt;P&gt;Then chapter&amp;nbsp;3.6.3.3 BCTU Software Trigger with DMA Data Transfer of the ADC driver manual gives you necessary configuration&amp;nbsp;to do a conversion data transfer from BCTU FIFO&lt;BR /&gt;to user buffer using DMA.&lt;/P&gt;
&lt;P&gt;BR, Petr&lt;/P&gt;</description>
      <pubDate>Thu, 12 Mar 2026 12:15:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Watermark-DMA-Enable-Issue/m-p/2331480#M57295</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2026-03-12T12:15:09Z</dc:date>
    </item>
    <item>
      <title>Re: Watermark DMA Enable Issue</title>
      <link>https://community.nxp.com/t5/S32K/Watermark-DMA-Enable-Issue/m-p/2332052#M57306</link>
      <description>&lt;P&gt;I have successfully obtained the ADC data using your method. However, the current problem is that the ADC data does not update and remains the same as the data obtained in the first conversion. The rest of the situations are normal. What could be the reason for this?&lt;/P&gt;</description>
      <pubDate>Fri, 13 Mar 2026 01:20:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Watermark-DMA-Enable-Issue/m-p/2332052#M57306</guid>
      <dc:creator>xingyun</dc:creator>
      <dc:date>2026-03-13T01:20:15Z</dc:date>
    </item>
    <item>
      <title>Re: Watermark DMA Enable Issue</title>
      <link>https://community.nxp.com/t5/S32K/Watermark-DMA-Enable-Issue/m-p/2333940#M57357</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;it looks the DMA channel is not reenabled again. Check interrupt and callback setting as&amp;nbsp;&lt;SPAN&gt;the ADC driver manual suggests.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;BR, Petr&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 17 Mar 2026 09:06:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Watermark-DMA-Enable-Issue/m-p/2333940#M57357</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2026-03-17T09:06:07Z</dc:date>
    </item>
    <item>
      <title>Re: Watermark DMA Enable Issue</title>
      <link>https://community.nxp.com/t5/S32K/Watermark-DMA-Enable-Issue/m-p/2338909#M57521</link>
      <description>&lt;P&gt;The DMA interrupt can be triggered normally, and the ADC data can also be obtained, but the data does not get updated. BctuDmaFifo1 only retains the first received data and does not update it. However, the ADC value obtained from the register can be updated. Could it be because I set TRGMUXn[13] to 0 when writing the register? I would like to ask, if using BCTU FIFO DMA, do we still need to manually write a program to transfer the source address to the destination address? I didn't carry out this operation. Could it be that this is the reason?&lt;/P&gt;</description>
      <pubDate>Wed, 25 Mar 2026 02:35:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Watermark-DMA-Enable-Issue/m-p/2338909#M57521</guid>
      <dc:creator>xingyun</dc:creator>
      <dc:date>2026-03-25T02:35:09Z</dc:date>
    </item>
  </channel>
</rss>

