<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Asymmetric Crypto (RSA/ECC) Support for Secure Flashing on S32K144 in S32K</title>
    <link>https://community.nxp.com/t5/S32K/Asymmetric-Crypto-RSA-ECC-Support-for-Secure-Flashing-on-S32K144/m-p/2316616#M56756</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/257154"&gt;@Kishore_14&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;CSEc on S32K1 supports only symmetric operations. Asymmetric operations are not supported by hardware. If needed, it must be emulated by software. You can use something like WolfSSL or similar.&lt;/P&gt;
&lt;P&gt;Because we do not provide such SW libraries, I can’t tell what will be the execution time. We do not have such benchmark.&lt;/P&gt;
&lt;P&gt;I would consider to use S32K3 devices with HSE which supports also asymmetric operations.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
    <pubDate>Wed, 11 Feb 2026 17:32:52 GMT</pubDate>
    <dc:creator>lukaszadrapa</dc:creator>
    <dc:date>2026-02-11T17:32:52Z</dc:date>
    <item>
      <title>Asymmetric Crypto (RSA/ECC) Support for Secure Flashing on S32K144</title>
      <link>https://community.nxp.com/t5/S32K/Asymmetric-Crypto-RSA-ECC-Support-for-Secure-Flashing-on-S32K144/m-p/2316042#M56736</link>
      <description>&lt;P&gt;&lt;STRONG&gt;Hi,&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;BR /&gt;Hardware:&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;S32K144EVB-Q100&lt;/SPAN&gt;&lt;BR /&gt;&lt;STRONG&gt;Software:&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;S32 Design Studio, OpenBLT Bootloader, an5401-csec&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;We are planning to implement a secure flashing on the S32K144. For asymmetric cryptography (RSA and ECC) used in firmware signature verification,&amp;nbsp;we would like to know:&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Is asymmetric cryptography (RSA/ECC) supported only via software implementation on the S32K144, or is there any hardware acceleration available for these algorithms?&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;If the S32K144 MCU does not have hardware acceleration for RSA or ECC, and must perform signature verification entirely in software (using the CPU),&amp;nbsp;&lt;SPAN&gt;what is the expected time required to verify a digital signature using:&lt;/SPAN&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;RSA with a 2048-bit key&lt;/LI&gt;&lt;LI&gt;ECC with the secp256r1 curve&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;LI&gt;Are there any reference documents, or recommended libraries for these operations on this MCU?&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;SPAN&gt;We need to know how long it takes to verify RSA and ECC signatures in software.&lt;BR /&gt;&lt;BR /&gt;Thanks.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 11 Feb 2026 06:05:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Asymmetric-Crypto-RSA-ECC-Support-for-Secure-Flashing-on-S32K144/m-p/2316042#M56736</guid>
      <dc:creator>Kishore_14</dc:creator>
      <dc:date>2026-02-11T06:05:24Z</dc:date>
    </item>
    <item>
      <title>Re: Asymmetric Crypto (RSA/ECC) Support for Secure Flashing on S32K144</title>
      <link>https://community.nxp.com/t5/S32K/Asymmetric-Crypto-RSA-ECC-Support-for-Secure-Flashing-on-S32K144/m-p/2316616#M56756</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/257154"&gt;@Kishore_14&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;CSEc on S32K1 supports only symmetric operations. Asymmetric operations are not supported by hardware. If needed, it must be emulated by software. You can use something like WolfSSL or similar.&lt;/P&gt;
&lt;P&gt;Because we do not provide such SW libraries, I can’t tell what will be the execution time. We do not have such benchmark.&lt;/P&gt;
&lt;P&gt;I would consider to use S32K3 devices with HSE which supports also asymmetric operations.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Wed, 11 Feb 2026 17:32:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Asymmetric-Crypto-RSA-ECC-Support-for-Secure-Flashing-on-S32K144/m-p/2316616#M56756</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2026-02-11T17:32:52Z</dc:date>
    </item>
  </channel>
</rss>

