topic Re: Inquiry regarding S32K3 PLL_LOL Reset during RF Immunity Testing (ALC Setting) in S32K

Inquiry regarding S32K3 PLL_LOL Reset during RF Immunity Testing (ALC Setting)

ssean — Thu, 29 Jan 2026 23:08:48 GMT

Hello.

We are currently conducting radio frequency immunity testing on a product utilizing the S32K312 MCU with 40MHz crystal.

We observed an MCU PLL_LOL (Loss of Lock) RESET occurring around the 800 MHz frequency band. However, we confirmed that the RESET does not occur when the Auto Level Control function is disabled by setting ALC_D = 1.

Based on this observation, I have the following questions:

1. What are the specific benefits of enabling the ALC feature?

2. What is the suspected reason for the system becoming more robust (preventing the reset) when ALC is disabled in this environment?

3. Assuming there are no operational issues, does NXP have a specific recommended setting (Enable/Disable) for the ALC function?

BRs,

Sean Sung

Re: Inquiry regarding S32K3 PLL_LOL Reset during RF Immunity Testing (ALC Setting)

PetrS — Fri, 30 Jan 2026 07:53:48 GMT

Hi,

1) Generally enabled ALC function dynamically adjusts the drive level of the crystal oscillator to maintain stable oscillation amplitude. This option has a significant impact on the driving capability (For example, the peak-to-peak voltage and the current) of the crystal, also have an impact on startup time. The detail value can refer to DS. There are specifications of IFXOSC and EXTAL_SWING_PP with ALC enabled and disabled. When ALC is disabled, the current consumption is higher, and the amplitude of the signal is higher, therefore, it is less sensitive to external noise, but it generates more noise. And vice-versa, with ALC enabled, the FXOSC can be more susceptible to external noise, but it generates less noise.

2) In certain special scenarios, it may be necessary to disable ALC. For example, in low-temperature environments, the crystal driving capability may be affected, and it is necessary to increase the peak-to-peak and current value. Or some hardware experiments (ESD) may require adjusting this value (GM/ALC, etc.)

3) Normally, we do not recommend turning off the ALC.

BR, Petr

Re: Inquiry regarding S32K3 PLL_LOL Reset during RF Immunity Testing (ALC Setting)

ssean — Mon, 02 Feb 2026 02:35:33 GMT

@PetrS
Thank you!