<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: S32K344 MCAL config error：Enhanced RX FIFO in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K344-MCAL-config-error-Enhanced-RX-FIFO/m-p/2302435#M56422</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/184101"&gt;@liyongfeng&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Instead of using enhanced RX FIFO, you can use individual mailboxes and set an ID for each one.&amp;nbsp;&lt;SPAN&gt;&amp;nbsp;FlexCAN supports individual masking per-MB (IRMQ bit set) or global masking scheme (IRMQ cleared). For example:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;DIV&gt;
&lt;TABLE width="155px"&gt;
&lt;TBODY&gt;
&lt;TR&gt;
&lt;TD width="75.0781px" height="25px" class="lia-align-center"&gt;&lt;STRONG&gt;Mailbox&lt;/STRONG&gt;&lt;/TD&gt;
&lt;TD width="58.0859px" height="25px" class="lia-align-center"&gt;&lt;STRONG&gt;ID&lt;/STRONG&gt;&lt;/TD&gt;
&lt;TD width="54.5508px" height="25px" class="lia-align-center"&gt;&lt;STRONG&gt;Mask&lt;/STRONG&gt;&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD width="75.0781px" height="25px"&gt;MB4&lt;/TD&gt;
&lt;TD width="58.0859px" height="25px"&gt;0x100&lt;/TD&gt;
&lt;TD width="54.5508px" height="25px"&gt;0x7FF&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD width="75.0781px" height="25px"&gt;MB5&lt;/TD&gt;
&lt;TD width="58.0859px" height="25px"&gt;0x101&lt;/TD&gt;
&lt;TD width="54.5508px" height="25px"&gt;0x7FF&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD width="75.0781px" height="25px"&gt;MB6&lt;/TD&gt;
&lt;TD width="58.0859px" height="25px"&gt;0x102&lt;/TD&gt;
&lt;TD width="54.5508px" height="25px"&gt;0x7FF&lt;/TD&gt;
&lt;/TR&gt;
&lt;/TBODY&gt;
&lt;/TABLE&gt;
&lt;/DIV&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Julián&lt;/P&gt;</description>
    <pubDate>Wed, 28 Jan 2026 20:41:02 GMT</pubDate>
    <dc:creator>Julián_AragónM</dc:creator>
    <dc:date>2026-01-28T20:41:02Z</dc:date>
    <item>
      <title>S32K344 MCAL config error：Enhanced RX FIFO</title>
      <link>https://community.nxp.com/t5/S32K/S32K344-MCAL-config-error-Enhanced-RX-FIFO/m-p/2301330#M56395</link>
      <description>&lt;P&gt;&lt;STRONG&gt;I want to enable the Enhanced RX FIFO function, but an error is reported. How can I resolve this?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;description: Invalid value for node "/Can/Can/CanConfigSet/CanController_1/CanRxFiFo": Controller physical does not support Enhance FIFO&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 27 Jan 2026 12:04:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K344-MCAL-config-error-Enhanced-RX-FIFO/m-p/2301330#M56395</guid>
      <dc:creator>liyongfeng</dc:creator>
      <dc:date>2026-01-27T12:04:09Z</dc:date>
    </item>
    <item>
      <title>Re: S32K344 MCAL config error：Enhanced RX FIFO</title>
      <link>https://community.nxp.com/t5/S32K/S32K344-MCAL-config-error-Enhanced-RX-FIFO/m-p/2301462#M56401</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/184101"&gt;@liyongfeng&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;If you are using S32K344 (or similar derivatives), only FlexCAN_0 supports Enhanced RX FIFO:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Julin_AragnM_0-1769534412994.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/374481i0440D8F932B26C6C/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Julin_AragnM_0-1769534412994.png" alt="Julin_AragnM_0-1769534412994.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Julián&lt;/P&gt;</description>
      <pubDate>Tue, 27 Jan 2026 17:21:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K344-MCAL-config-error-Enhanced-RX-FIFO/m-p/2301462#M56401</guid>
      <dc:creator>Julián_AragónM</dc:creator>
      <dc:date>2026-01-27T17:21:30Z</dc:date>
    </item>
    <item>
      <title>Re: S32K344 MCAL config error：Enhanced RX FIFO</title>
      <link>https://community.nxp.com/t5/S32K/S32K344-MCAL-config-error-Enhanced-RX-FIFO/m-p/2301587#M56406</link>
      <description>&lt;P&gt;Thank you for your reply.&lt;/P&gt;&lt;P&gt;In the current application，FlexCAN_1 is used for the CAN FD message format. I want to filter the received CAN IDs one by one (since the global mask can only be 7FF). What method should I adopt?&lt;/P&gt;</description>
      <pubDate>Wed, 28 Jan 2026 01:21:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K344-MCAL-config-error-Enhanced-RX-FIFO/m-p/2301587#M56406</guid>
      <dc:creator>liyongfeng</dc:creator>
      <dc:date>2026-01-28T01:21:05Z</dc:date>
    </item>
    <item>
      <title>Re: S32K344 MCAL config error：Enhanced RX FIFO</title>
      <link>https://community.nxp.com/t5/S32K/S32K344-MCAL-config-error-Enhanced-RX-FIFO/m-p/2302435#M56422</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/184101"&gt;@liyongfeng&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Instead of using enhanced RX FIFO, you can use individual mailboxes and set an ID for each one.&amp;nbsp;&lt;SPAN&gt;&amp;nbsp;FlexCAN supports individual masking per-MB (IRMQ bit set) or global masking scheme (IRMQ cleared). For example:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;DIV&gt;
&lt;TABLE width="155px"&gt;
&lt;TBODY&gt;
&lt;TR&gt;
&lt;TD width="75.0781px" height="25px" class="lia-align-center"&gt;&lt;STRONG&gt;Mailbox&lt;/STRONG&gt;&lt;/TD&gt;
&lt;TD width="58.0859px" height="25px" class="lia-align-center"&gt;&lt;STRONG&gt;ID&lt;/STRONG&gt;&lt;/TD&gt;
&lt;TD width="54.5508px" height="25px" class="lia-align-center"&gt;&lt;STRONG&gt;Mask&lt;/STRONG&gt;&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD width="75.0781px" height="25px"&gt;MB4&lt;/TD&gt;
&lt;TD width="58.0859px" height="25px"&gt;0x100&lt;/TD&gt;
&lt;TD width="54.5508px" height="25px"&gt;0x7FF&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD width="75.0781px" height="25px"&gt;MB5&lt;/TD&gt;
&lt;TD width="58.0859px" height="25px"&gt;0x101&lt;/TD&gt;
&lt;TD width="54.5508px" height="25px"&gt;0x7FF&lt;/TD&gt;
&lt;/TR&gt;
&lt;TR&gt;
&lt;TD width="75.0781px" height="25px"&gt;MB6&lt;/TD&gt;
&lt;TD width="58.0859px" height="25px"&gt;0x102&lt;/TD&gt;
&lt;TD width="54.5508px" height="25px"&gt;0x7FF&lt;/TD&gt;
&lt;/TR&gt;
&lt;/TBODY&gt;
&lt;/TABLE&gt;
&lt;/DIV&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Julián&lt;/P&gt;</description>
      <pubDate>Wed, 28 Jan 2026 20:41:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K344-MCAL-config-error-Enhanced-RX-FIFO/m-p/2302435#M56422</guid>
      <dc:creator>Julián_AragónM</dc:creator>
      <dc:date>2026-01-28T20:41:02Z</dc:date>
    </item>
  </channel>
</rss>

