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    <title>topic Re: S32K312  uart AsyncReceive callback event is always error when SPI DMA transfer mass data in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K312-uart-AsyncReceive-callback-event-is-always-error-when/m-p/2262870#M55413</link>
    <description>&lt;P&gt;Yes, It is the Interrupt Priority Issue, Uart1 works after Raising it's Priority.&lt;/P&gt;&lt;P&gt;Thanks so much!&lt;/P&gt;</description>
    <pubDate>Mon, 15 Dec 2025 13:18:17 GMT</pubDate>
    <dc:creator>gan89557</dc:creator>
    <dc:date>2025-12-15T13:18:17Z</dc:date>
    <item>
      <title>S32K312  uart AsyncReceive callback event is always error when SPI DMA transfer mass data</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-uart-AsyncReceive-callback-event-is-always-error-when/m-p/2261799#M55355</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;/P&gt;&lt;P&gt;S32K312 S32DS3.5 RTD4.0.0 project, SPI0 and SPI1 work with DMA mode, and UART1 work with Interrupt mode.&lt;/P&gt;&lt;P&gt;UART1 work well when sync send or async receive a frame&amp;nbsp; of 12 bytes.&lt;/P&gt;&lt;P&gt;But uart AsyncReceive callback event is always error when SPI DMA transfer mass data.&lt;/P&gt;&lt;P&gt;Any suggestion?&lt;/P&gt;</description>
      <pubDate>Sat, 13 Dec 2025 14:57:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-uart-AsyncReceive-callback-event-is-always-error-when/m-p/2261799#M55355</guid>
      <dc:creator>gan89557</dc:creator>
      <dc:date>2025-12-13T14:57:18Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312  uart AsyncReceive callback event is always error when SPI DMA transfer mass data</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-uart-AsyncReceive-callback-event-is-always-error-when/m-p/2262730#M55399</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;DIV&gt;
&lt;P&gt;there can be below possible reasons for UART Async Receive Errors during SPI DMA bursts:&lt;/P&gt;
&lt;P&gt;1. Interrupt Priority Issue&lt;/P&gt;
&lt;P&gt;- UART RX interrupt is not serviced quickly because DMA completion or other ISRs have equal or higher priority.&lt;BR /&gt;&lt;SPAN&gt;- Result: UART RX FIFO overflows → overrun or framing error.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;Ensure LPUART1_IRQn has higher priority (numerically lower) than all DMA-related IRQs (e.g., DMATCDx_IRQn).&amp;nbsp;Confirm interrupt grouping allows preemption.&lt;/P&gt;
&lt;P&gt;2. Bus Occupation by DMA&lt;/P&gt;
&lt;P&gt;- eDMA channels for SPI can saturate the AXBS crossbar during large bursts.&lt;BR /&gt;- CPU and peripheral register accesses (including UART RX handling) are delayed, increasing ISR latency.&lt;/P&gt;
&lt;DIV&gt;Configure SPI DMA channels to allow&amp;nbsp;eDMA engine stalls (BWC setting)&lt;/DIV&gt;
&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV&gt;BR, Petr&lt;/DIV&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;/DIV&gt;</description>
      <pubDate>Mon, 15 Dec 2025 10:28:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-uart-AsyncReceive-callback-event-is-always-error-when/m-p/2262730#M55399</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2025-12-15T10:28:50Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312  uart AsyncReceive callback event is always error when SPI DMA transfer mass data</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-uart-AsyncReceive-callback-event-is-always-error-when/m-p/2262870#M55413</link>
      <description>&lt;P&gt;Yes, It is the Interrupt Priority Issue, Uart1 works after Raising it's Priority.&lt;/P&gt;&lt;P&gt;Thanks so much!&lt;/P&gt;</description>
      <pubDate>Mon, 15 Dec 2025 13:18:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-uart-AsyncReceive-callback-event-is-always-error-when/m-p/2262870#M55413</guid>
      <dc:creator>gan89557</dc:creator>
      <dc:date>2025-12-15T13:18:17Z</dc:date>
    </item>
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