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    <title>S32K中的主题 Re: MEMORY ASSIGNING ISSUE</title>
    <link>https://community.nxp.com/t5/S32K/MEMORY-ASSIGNING-ISSUE/m-p/2248359#M54804</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/257286"&gt;@Varshini_ext&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;There are many possible root causes.&lt;/P&gt;
&lt;P&gt;Try find more information about the fault exception.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-HARDFAULT-Handling-Interrupt-DS3-5-RTD300/ta-p/1806259" target="_blank"&gt;https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-HARDFAULT-Handling-Interrupt-DS3-5-RTD300/ta-p/1806259&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/How-To-Debug-A-Fault-Exception-On-ARM-Cortex-M-V7M-MCU-S32K3XX/ta-p/1595570" target="_blank"&gt;https://community.nxp.com/t5/S32K-Knowledge-Base/How-To-Debug-A-Fault-Exception-On-ARM-Cortex-M-V7M-MCU-S32K3XX/ta-p/1595570&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/Fault-handling-on-S32K14x/ta-p/1114447" target="_blank"&gt;https://community.nxp.com/t5/S32K-Knowledge-Base/Fault-handling-on-S32K14x/ta-p/1114447&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;What kind of fault exception is it?&lt;/P&gt;
&lt;P&gt;What is the PC address of the fault instruction?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thank you,&lt;/P&gt;
&lt;P&gt;BR, Daniel&lt;/P&gt;</description>
    <pubDate>Tue, 25 Nov 2025 11:42:24 GMT</pubDate>
    <dc:creator>danielmartynek</dc:creator>
    <dc:date>2025-11-25T11:42:24Z</dc:date>
    <item>
      <title>MEMORY ASSIGNING ISSUE</title>
      <link>https://community.nxp.com/t5/S32K/MEMORY-ASSIGNING-ISSUE/m-p/2248085#M54789</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am trying to build to integrate a new folder into the existing project in S32K322 microcontroller. But I am facing hardfault issue in Clock driver. From my observation the hardfault is not ocurring because of insufficient memory, there is sufficient memory available in sram. I would like to know that is there any limitations in acessing the sram memory.&lt;/P&gt;&lt;P&gt;Note:&lt;/P&gt;&lt;P&gt;1)I have created a project with dual core(CM0,CM1) enabled.&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;2)I am attaching the memory usage of existing project created and a new folder integrated project.&amp;nbsp;&lt;/P&gt;&lt;P&gt;3)Just adding 700 extra byte size is causing a hardfault.&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Existing project memory usage" style="width: 765px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/367087i3EB236E9601BB259/image-size/large?v=v2&amp;amp;px=999" role="button" title="image.png" alt="Existing project memory usage" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;Existing project memory usage&lt;/span&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Memory usage after integration of new folder" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/367090i362EF1549D4E2A06/image-size/large?v=v2&amp;amp;px=999" role="button" title="image (1).png" alt="Memory usage after integration of new folder" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;Memory usage after integration of new folder&lt;/span&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="image (1).png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/367089i03A25ED017B47D5D/image-size/large?v=v2&amp;amp;px=999" role="button" title="image (1).png" alt="image (1).png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;image (1).png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Varshni&lt;/P&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 25 Nov 2025 06:52:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/MEMORY-ASSIGNING-ISSUE/m-p/2248085#M54789</guid>
      <dc:creator>Varshini_ext</dc:creator>
      <dc:date>2025-11-25T06:52:15Z</dc:date>
    </item>
    <item>
      <title>Re: MEMORY ASSIGNING ISSUE</title>
      <link>https://community.nxp.com/t5/S32K/MEMORY-ASSIGNING-ISSUE/m-p/2248359#M54804</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/257286"&gt;@Varshini_ext&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;There are many possible root causes.&lt;/P&gt;
&lt;P&gt;Try find more information about the fault exception.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-HARDFAULT-Handling-Interrupt-DS3-5-RTD300/ta-p/1806259" target="_blank"&gt;https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-HARDFAULT-Handling-Interrupt-DS3-5-RTD300/ta-p/1806259&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/How-To-Debug-A-Fault-Exception-On-ARM-Cortex-M-V7M-MCU-S32K3XX/ta-p/1595570" target="_blank"&gt;https://community.nxp.com/t5/S32K-Knowledge-Base/How-To-Debug-A-Fault-Exception-On-ARM-Cortex-M-V7M-MCU-S32K3XX/ta-p/1595570&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/Fault-handling-on-S32K14x/ta-p/1114447" target="_blank"&gt;https://community.nxp.com/t5/S32K-Knowledge-Base/Fault-handling-on-S32K14x/ta-p/1114447&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;What kind of fault exception is it?&lt;/P&gt;
&lt;P&gt;What is the PC address of the fault instruction?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thank you,&lt;/P&gt;
&lt;P&gt;BR, Daniel&lt;/P&gt;</description>
      <pubDate>Tue, 25 Nov 2025 11:42:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/MEMORY-ASSIGNING-ISSUE/m-p/2248359#M54804</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2025-11-25T11:42:24Z</dc:date>
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