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    <title>topic Re: S32K144 SPI baudrate in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2200407#M54235</link>
    <description>&lt;P&gt;ok, thank you.&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 07 Nov 2025 01:25:00 GMT</pubDate>
    <dc:creator>lyz</dc:creator>
    <dc:date>2025-11-07T01:25:00Z</dc:date>
    <item>
      <title>S32K144 SPI baudrate</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2199680#M54188</link>
      <description>&lt;P&gt;How do caculate&amp;nbsp;S32K144 SPI Baudrate. How is computational formula？I see that in SDK. As fllow:&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;realBaudrate = (sourceClockInHz / (s_baudratePrescaler[prescaler] * (scaler + (uint32_t)2U)));&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;but， I do not understand. please tell me how is computational formula! thanks.&lt;/P&gt;</description>
      <pubDate>Thu, 06 Nov 2025 03:15:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2199680#M54188</guid>
      <dc:creator>lyz</dc:creator>
      <dc:date>2025-11-06T03:15:26Z</dc:date>
    </item>
    <item>
      <title>回复： S32K144 SPI baudrate</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2199681#M54189</link>
      <description>&lt;P&gt;&lt;STRONG&gt;&lt;SPAN&gt;&amp;nbsp;I do not understand these:&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;The SCK period is equal to (SCKDIV+2) cycles of the LPSPI functional clock divided by the Prescaler Value TCR[PRESCALE] configuration.&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;realBaudrate = (sourceClockInHz / (s_baudratePrescaler[prescaler] * (scaler + (uint32_t)2U)));&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 06 Nov 2025 03:21:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2199681#M54189</guid>
      <dc:creator>lyz</dc:creator>
      <dc:date>2025-11-06T03:21:14Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 SPI baudrate</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2200212#M54226</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/201182"&gt;@lyz&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The SPI baud rate is calculated as:&lt;/P&gt;
&lt;P&gt;Baud&amp;nbsp;Rate = (Functional clock / PRESCALE) / (SCKDIV+2)&lt;/P&gt;
&lt;P&gt;PRESCALE: Configured in the Transmit Command Register (TCR).&lt;/P&gt;
&lt;P&gt;SCKDIV: Configured in the Clock Configuration Register (CCR).&lt;/P&gt;
&lt;P&gt;If you find the SDK implementation confusing, refer to section 2.8 of the &lt;A href="https://www.nxp.com/docs/en/application-note/AN5413.pdf" target="_blank" rel="noopener"&gt;S32K1xx Series Cookbook&lt;/A&gt;. It is a good starting point for understanding how to configure the LPSPI.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR, VaneB&lt;/P&gt;</description>
      <pubDate>Thu, 06 Nov 2025 17:02:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2200212#M54226</guid>
      <dc:creator>VaneB</dc:creator>
      <dc:date>2025-11-06T17:02:20Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 SPI baudrate</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2200407#M54235</link>
      <description>&lt;P&gt;ok, thank you.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 07 Nov 2025 01:25:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2200407#M54235</guid>
      <dc:creator>lyz</dc:creator>
      <dc:date>2025-11-07T01:25:00Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 SPI baudrate</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2200861#M54269</link>
      <description>&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lyz_0-1762514940762.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/364454iE9E56490D641843E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lyz_0-1762514940762.png" alt="lyz_0-1762514940762.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Project from example config delay in SDK, as follow. Why?&amp;nbsp;I do not understand:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lyz_1-1762515003416.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/364455iB44C48E862DEDA93/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lyz_1-1762515003416.png" alt="lyz_1-1762515003416.png" /&gt;&lt;/span&gt;&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;in&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN5413.pdf" target="_blank" rel="noopener nofollow noreferrer"&gt;S32K1xx Series Cookbook&lt;/A&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lyz_2-1762515048459.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/364456iF3075E8F763FEB87/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lyz_2-1762515048459.png" alt="lyz_2-1762515048459.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;so,&lt;/P&gt;&lt;P&gt;How config SCKPCS of SCK-to-PCS Delay？&lt;/P&gt;&lt;P&gt;How config&amp;nbsp;PCSSCK of PCS-to-SCK Delay？&lt;/P&gt;&lt;P&gt;How config DBT of Delay Between Transfers？&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 07 Nov 2025 12:13:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2200861#M54269</guid>
      <dc:creator>lyz</dc:creator>
      <dc:date>2025-11-07T12:13:06Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 SPI baudrate</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2201089#M54279</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/201182"&gt;@lyz&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The bestScaler is used to configure delay registers because these delays scale with the SPI clock. Applying a right shift by 2 (&amp;gt;&amp;gt; 2U, equivalent to dividing by 4) ensures the delay values remain proportional to the baud rate without being excessively large, providing balanced timing margins for PCS-to-SCK, SCK-to-PCS, and Delay Between Transfers.&lt;/P&gt;</description>
      <pubDate>Fri, 07 Nov 2025 22:03:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2201089#M54279</guid>
      <dc:creator>VaneB</dc:creator>
      <dc:date>2025-11-07T22:03:53Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 SPI baudrate</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2201218#M54286</link>
      <description>&lt;P&gt;I understand logic in SDK code, but the logic&amp;nbsp;&lt;SPAN&gt;(&amp;gt;&amp;gt; 2U, equivalent to dividing by 4) refence where&amp;nbsp;describe. The reference of S32K-RM.pdf&amp;nbsp;provide of the logic, as follow:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lyz_0-1762650599443.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/364518iA0722C5C0366A3E4/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lyz_0-1762650599443.png" alt="lyz_0-1762650599443.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;so,&amp;nbsp;What is the configuration logic, about&amp;nbsp;SCKPCS /&amp;nbsp;PCSSCK / and PCSSCK ?&lt;/P&gt;&lt;P&gt;How config SCKPCS of SCK-to-PCS Delay？&lt;/P&gt;&lt;P&gt;How config&amp;nbsp;PCSSCK of PCS-to-SCK Delay？&lt;/P&gt;&lt;P&gt;How config DBT of Delay Between Transfers&lt;/P&gt;&lt;P&gt;in detail.&lt;/P&gt;</description>
      <pubDate>Sun, 09 Nov 2025 01:12:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2201218#M54286</guid>
      <dc:creator>lyz</dc:creator>
      <dc:date>2025-11-09T01:12:27Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 SPI baudrate</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2201393#M54297</link>
      <description>&lt;P&gt;hello,&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/201913"&gt;@VaneB&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;SPAN&gt;Project from example config delay in SDK, as follow&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lyz_0-1762742669180.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/364552iB34F6A76F782AD63/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lyz_0-1762742669180.png" alt="lyz_0-1762742669180.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;the logic&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;(&amp;gt;&amp;gt; 2U, equivalent to dividing by 4) refence where&amp;nbsp;describe, Why?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I fell that it is diffent the logic whitch the reference of S32K-RM.pdf&amp;nbsp;provide, as follow:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I do not understand!&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lyz_1-1762742702023.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/364553i9974810804F0892A/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lyz_1-1762742702023.png" alt="lyz_1-1762742702023.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;What is the configuration logic, about&amp;nbsp;SCKPCS /&amp;nbsp;PCSSCK / and PCSSCK ?&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Please tell me.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you very much!&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 10 Nov 2025 02:56:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2201393#M54297</guid>
      <dc:creator>lyz</dc:creator>
      <dc:date>2025-11-10T02:56:17Z</dc:date>
    </item>
    <item>
      <title>Re: S32K144 SPI baudrate</title>
      <link>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2202036#M54332</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/201182"&gt;@lyz&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The use of &amp;gt;&amp;gt; 2U (equivalent to dividing by 4) for delay calculations is not documented in the reference manual as a strict formula. Instead, it originates from SDK timing guidelines intended to ensure proper functionality.&lt;/P&gt;</description>
      <pubDate>Mon, 10 Nov 2025 17:41:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K144-SPI-baudrate/m-p/2202036#M54332</guid>
      <dc:creator>VaneB</dc:creator>
      <dc:date>2025-11-10T17:41:01Z</dc:date>
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