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    <title>topic Re: Invalidating the Data Cache before Enabling it makes some peripherals not work in S32K</title>
    <link>https://community.nxp.com/t5/S32K/Invalidating-the-Data-Cache-before-Enabling-it-makes-some/m-p/2190788#M53750</link>
    <description>&lt;P&gt;Yeah Agree with you&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your fast replies&amp;nbsp;&lt;/P&gt;&lt;P&gt;Have a nice day&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Wed, 22 Oct 2025 12:44:32 GMT</pubDate>
    <dc:creator>MohamedSalah</dc:creator>
    <dc:date>2025-10-22T12:44:32Z</dc:date>
    <item>
      <title>Invalidating the Data Cache before Enabling it makes some peripherals not work</title>
      <link>https://community.nxp.com/t5/S32K/Invalidating-the-Data-Cache-before-Enabling-it-makes-some/m-p/2187732#M53632</link>
      <description>&lt;P&gt;Hi Experts I am using RTD 4.0.0 For S32K312&amp;nbsp;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;I am working on a project that is configuring ADC to work in CTU and get triggered by BCTU Module&lt;/LI&gt;&lt;LI&gt;ADC,BCTU PWM all the system works fine.&lt;/LI&gt;&lt;LI&gt;I want to Enable Caching to increase the performance of the System&amp;nbsp;&lt;/LI&gt;&lt;LI&gt;The issue happens when I invalidate the Data cache before using it As suggested by the MCL_UserManual&amp;nbsp;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="MohamedSalah_0-1760639518727.png" style="width: 520px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/361236iB6CAAA2D94C9441D/image-dimensions/520x199?v=v2" width="520" height="199" role="button" title="MohamedSalah_0-1760639518727.png" alt="MohamedSalah_0-1760639518727.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="MohamedSalah_1-1760639644647.png" style="width: 438px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/361237i898B1F23E64D9E68/image-dimensions/438x138?v=v2" width="438" height="138" role="button" title="MohamedSalah_1-1760639644647.png" alt="MohamedSalah_1-1760639644647.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;When I call the api [Mcl_CacheInvalidate()] for the Data cache&amp;nbsp;&lt;/LI&gt;&lt;LI&gt;The : - BCTU Stops working -ADC Stops working -Some PWM Signals stopped working&amp;nbsp;&lt;/LI&gt;&lt;LI&gt;While If I comment the Call -&amp;gt; Everything works fine&amp;nbsp;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="MohamedSalah_2-1760639760576.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/361238i80CC486410985C31/image-size/medium?v=v2&amp;amp;px=400" role="button" title="MohamedSalah_2-1760639760576.png" alt="MohamedSalah_2-1760639760576.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;I thought maybe the Invalidation steps messes with some data related to the peripherals&lt;/LI&gt;&lt;LI&gt;I made sure the MPU is enabled and the peripherals region are added to a Non Cacheable memory region but the issue still the same&amp;nbsp;&lt;/LI&gt;&lt;LI&gt;I even explictly added some flags and variables related to the BCTU ISR in No Cacheable section as a test but no difference happens&amp;nbsp;&lt;/LI&gt;&lt;LI&gt;I looked the target Reference Manual and the ERRATA but found no help regarding this issue&amp;nbsp;&lt;/LI&gt;&lt;LI&gt;Also checked other Posts in the community but found no case similar to mine&amp;nbsp;&lt;/LI&gt;&lt;LI&gt;I even checked other examples related to the DMA and MPU hoping to find some hint about the Cache Enable but couldn't reach anything&amp;nbsp;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;The Question is :&amp;nbsp;&lt;/P&gt;&lt;P&gt;-What could be the reason for this ?&lt;/P&gt;&lt;P&gt;-is the Invalidation of the Data Cache needed ?&lt;/P&gt;&lt;P&gt;-Is this the valid way to enable cache in S32K312 ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards,&amp;nbsp;&lt;/P&gt;&lt;P&gt;Mohamed Moghazy&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 16 Oct 2025 18:45:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Invalidating-the-Data-Cache-before-Enabling-it-makes-some/m-p/2187732#M53632</guid>
      <dc:creator>MohamedSalah</dc:creator>
      <dc:date>2025-10-16T18:45:18Z</dc:date>
    </item>
    <item>
      <title>Re: Invalidating the Data Cache before Enabling it makes some peripherals not work</title>
      <link>https://community.nxp.com/t5/S32K/Invalidating-the-Data-Cache-before-Enabling-it-makes-some/m-p/2189127#M53678</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/209398"&gt;@MohamedSalah&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Are you configuring the MPU using RTD, or is it being set up during startup code execution?&lt;/P&gt;
&lt;P&gt;Could you share your MPU region configuration?&lt;/P&gt;
&lt;P&gt;When exactly are you calling &lt;CODE&gt;Mcl_CacheInvalidate()&lt;/CODE&gt; and enabling the cache?&amp;nbsp;Is it during MCU initialization&amp;nbsp;or later during runtime?&lt;/P&gt;
&lt;P&gt;Are you using DMA with ADC, BCTU, or PWM?&amp;nbsp;If yes, are the DMA buffers placed in non-cacheable memory regions?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 20 Oct 2025 10:06:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Invalidating-the-Data-Cache-before-Enabling-it-makes-some/m-p/2189127#M53678</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2025-10-20T10:06:56Z</dc:date>
    </item>
    <item>
      <title>Re: Invalidating the Data Cache before Enabling it makes some peripherals not work</title>
      <link>https://community.nxp.com/t5/S32K/Invalidating-the-Data-Cache-before-Enabling-it-makes-some/m-p/2189967#M53727</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/160001"&gt;@danielmartynek&lt;/a&gt;&amp;nbsp;,&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for you reply&amp;nbsp;&lt;/P&gt;&lt;P&gt;Yesterday I made more debugging in the SW , turns out Cache and MPU are already enabled by the startup code&amp;nbsp;&lt;/P&gt;&lt;P&gt;inside the file [system.c] , it checks for some macros to either enable or not [I-Cache, D-Cache , MPU]&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="MohamedSalah_0-1761048827484.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/361869i7D3DF14659FD3F5A/image-size/medium?v=v2&amp;amp;px=400" role="button" title="MohamedSalah_0-1761048827484.png" alt="MohamedSalah_0-1761048827484.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="MohamedSalah_1-1761048866987.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/361870iBCFB6EED7C661946/image-size/medium?v=v2&amp;amp;px=400" role="button" title="MohamedSalah_1-1761048866987.png" alt="MohamedSalah_1-1761048866987.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;And those macros are already defined in the project settings&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="MohamedSalah_2-1761049333877.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/361871iD97A598B6B319D8D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="MohamedSalah_2-1761049333877.png" alt="MohamedSalah_2-1761049333877.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;- I think the issue when I was calling [Mcl_CacheInvalidate] there are already data added to the data cache and this results removing these data which affects the peripherals&amp;nbsp;&lt;/P&gt;&lt;P&gt;-To test the Theory:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;I removed the data and instruction cache enable macros from the project settings&amp;nbsp;&lt;/LI&gt;&lt;LI&gt;left the MPU to be enabled by the startup code and removed the MPU Configuration from the MCL&amp;nbsp;&lt;/LI&gt;&lt;LI&gt;made sure that the startup code is not enabling the cache&amp;nbsp;&lt;/LI&gt;&lt;LI&gt;Enabled the cache support in the Mcl Configuration&lt;/LI&gt;&lt;LI&gt;and call the functions [Mcl_CacheInvalidate] and [Mcl_CacheEnable] as before right after the Mcl_Init()&lt;/LI&gt;&lt;LI&gt;Everything works fine and the issues with the [BCTU,PWM and ADC] are solved !!!&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;STRONG&gt;New Question&lt;/STRONG&gt;: In your opinion would it be better to let the startup code enable and initialize the cache and MPU or should disable its handling and do this using the MCL Module , given that my project is running a PMSM Motor using FOC [Using NXP Application note on the topic:AN13767_3-phase_Sensorless_PMSM_Motor_Control_Kit_with_S32K344] ?&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Mohamed Salah&lt;/P&gt;</description>
      <pubDate>Tue, 21 Oct 2025 12:34:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Invalidating-the-Data-Cache-before-Enabling-it-makes-some/m-p/2189967#M53727</guid>
      <dc:creator>MohamedSalah</dc:creator>
      <dc:date>2025-10-21T12:34:48Z</dc:date>
    </item>
    <item>
      <title>Re: Invalidating the Data Cache before Enabling it makes some peripherals not work</title>
      <link>https://community.nxp.com/t5/S32K/Invalidating-the-Data-Cache-before-Enabling-it-makes-some/m-p/2190586#M53744</link>
      <description>&lt;P&gt;Hi&amp;nbsp;Mohamed,&lt;/P&gt;
&lt;P&gt;Thank for the update, your observation makes sense.&lt;/P&gt;
&lt;P&gt;If the MPU and cache are configured by the MCAL Platform and MCL drivers immediately after startup - before any real-time peripherals begin operation - there should be no issues, especially if the MPU settings in both the startup code and the application are consistent.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
      <pubDate>Wed, 22 Oct 2025 08:34:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Invalidating-the-Data-Cache-before-Enabling-it-makes-some/m-p/2190586#M53744</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2025-10-22T08:34:52Z</dc:date>
    </item>
    <item>
      <title>Re: Invalidating the Data Cache before Enabling it makes some peripherals not work</title>
      <link>https://community.nxp.com/t5/S32K/Invalidating-the-Data-Cache-before-Enabling-it-makes-some/m-p/2190788#M53750</link>
      <description>&lt;P&gt;Yeah Agree with you&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your fast replies&amp;nbsp;&lt;/P&gt;&lt;P&gt;Have a nice day&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 22 Oct 2025 12:44:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Invalidating-the-Data-Cache-before-Enabling-it-makes-some/m-p/2190788#M53750</guid>
      <dc:creator>MohamedSalah</dc:creator>
      <dc:date>2025-10-22T12:44:32Z</dc:date>
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