topic Re: S32K344 Lock step core in S32K

S32K344 Lock step core

nirmal_masilamani — Thu, 09 Oct 2025 06:10:43 GMT

Hello Team,

I am currently working on S32K344, we want to know, how to enable lockstep core in S32K344.

I have referred below community post,

Solved: S32K344 Lock-step kernel - NXP Community.

One thing is not clear, how to know, address for UTEST_MISC to enable/ disable lockstep.?

Re: S32K344 Lock step core

petervlna — Thu, 09 Oct 2025 07:41:38 GMT

Hello,

One thing is not clear, how to know, address for UTEST_MISC to enable/ disable lockstep.?

There is no fixed address of UTEST_MISC. It is not a register, it is a DCF (device configuration record) which is during reset phase copied to corresponding register/ registers.

You will program UTEST_MISC record into the UTEST memory in user area to the first available space.

It is in this area:

First available space is filled with 0xFFFF_FFFF_FFFF_FFFF which is stop record. So load you DCF record here.

Best regards,
Peter

Re: S32K344 Lock step core

nirmal_masilamani — Thu, 09 Oct 2025 08:42:23 GMT

Hello @petervlna ,

Thanks for your reply.

Can you show me an example DCF record for enabling lockstep in S32K344,

Re: S32K344 Lock step core

nirmal_masilamani — Thu, 09 Oct 2025 09:13:23 GMT

Hi @petervlna ,

Below image id the data available in 0x1B000700, so i need to copy my DCF record in 0x1B000770?

Can you give me an example for DCF Records, to enable Lockstep

Is there any document for DCF details?

Re: S32K344 Lock step core

petervlna — Fri, 10 Oct 2025 08:05:08 GMT

Hello,

Below image id the data available in 0x1B000700, so i need to copy my DCF record in 0x1B000770?

Yes, that is correct.

Here is how the record should looks like:

at address 0x1B000770 you will load: 0x0010000400000101

So you will modify the example here:

The example code for UTEST programming is here:

https://community.nxp.com/t5/S32K/S32K344-Lock-step-kernel/m-p/1930030

Here is DCF configurator:

https://community.nxp.com/t5/S32K-Knowledge-Base/S32K344-DCF-Configurator/ta-p/1986243

For lauterbach debugger:

data.set 0x1B000790 %QUAD 0x0010000400000101 ;dcf_client_utest_misc

and in S3 record for PE Micro and other:

S30D1B00077001010000040010005A

Best regards,

Peter

Re: S32K344 Lock step core

nirmal_masilamani — Fri, 10 Oct 2025 11:22:29 GMT

Hello @petervlna ,

Thank you for your reply.

S3 record for PE Micro and other:

S30D1B00077001010000040010005A,

We are using PE Micro, how can i use this S record?

And is it mandatory to use S record or can i program DCF record directly using the example program?

Re: S32K344 Lock step core

petervlna — Mon, 13 Oct 2025 06:51:52 GMT

Hello,

We are using PE Micro, how can i use this S record?

I am not familiar with PE debuggers, but looking at documentation:

And is it mandatory to use S record or can i program DCF record directly using the example program?

Using S32 Design Studio + PE Micro Plugin

Prepare your DCF record:
- Identify the next available address in UTEST (look for the first double-word filled with 0xFF).
Create a .srec file:
- Format the DCF record into an S-record file.
Configure Debugger in S32DS:
- Use PE Micro’s plugin to set up a debugger configuration.
- Load the .srec file as the application.
- Use the correct flash algorithm (e.g., nxp_s32k344_1x32x1012k_hse_disabled.arp).
Flash the DCF Record:
- Start the debug session.
- Verify the record in Memory View.

Using PE Micro’s PROG-HL-ARM Tool

This standalone tool supports flashing via JTAG/SWD.
You can load .srec or binary files and program them directly.
Ideal for production environments using Cyclone programmers.

More info: PE Micro S32K344 Support Page

And is it mandatory to use S record or can i program DCF record directly using the example program?

As UTEST is just standard flash, with OTP enabled, you can use SW to program it, like I have shared. For example C40 driver example.

Best regards,

Peter

Re: S32K344 Lock step core

nirmal_masilamani — Mon, 13 Oct 2025 09:19:41 GMT

Hello @petervlna ,

Thanks for your reply.

But i am unable to debug, debugging failed with .srec files.

Re: S32K344 Lock step core

petervlna — Tue, 14 Oct 2025 06:40:52 GMT

Hello,

I am confused here.

Why you are using extension srec? The debugger states that is not an object file.

When using PE Micro tools to program devices using S-record (.srec) files, the type of S-record format you use—such as S1, S2, or S3—depends on the address range of the target device's memory.

Here’s a quick breakdown:

S1 records: Use 16-bit addresses (up to 64 KB). Suitable for small memory ranges.
S2 records: Use 24-bit addresses (up to 16 MB). Less common, but used for mid-range addressing.
S3 records: Use 32-bit addresses (up to 4 GB). Most commonly used for modern microcontrollers and flash programming.

For PE Micro programming:

If you're targeting a 32-bit MCU or using a memory map that goes beyond 64 KB, you should use S3 records.
PE Micro tools like PROG or Cyclone programmers typically support S3 format for flash programming.

Maybe I am wrong, but use S3 extension instead of srec.

Best regards,

Peter

Re: S32K344 Lock step core

nirmal_masilamani — Thu, 16 Oct 2025 10:21:22 GMT

hello @petervlna ,

I have referred the below community post for debugging using .srec file.

HOWTO: Program DCF record into UTEST flash in S32 Design Studio for Power - NXP Community

.s3 extension also not working

WIth S32DS and PEMICRO,

Is there a way to program DCF record using .srec file?

If yes, can you share any refer documents?

Re: S32K344 Lock step core

petervlna — Mon, 20 Oct 2025 09:30:26 GMT

Hello,

Yes, you can program DCF records into UTEST flash on the S32K344 using a .srec file with S32 Design Studio (S32DS) and PEMICRO tools. Here's a summary of how to do it and where to find supporting documentation:

Steps to Program DCF Record Using .srec File

Prepare the DCF Record:
- Use the S32K344 DCF Configurator tool to calculate the correct DCF record values. [community.nxp.com]
- Identify the next available address in UTEST flash (e.g., starting from 0x1B000700) by checking for the first double-word filled with 0xFF.
Create the .srec File:
- Format the DCF record into an S3 record line.
- Example: S30D1B00077001010000040010005A
- This line represents a DCF record at address 0x1B000770. [community.nxp.com]
Configure S32DS Debugger:
- Create a new debug configuration in S32DS.
- Set the .srec file as the application to load.
- In the debugger tab, enable "Use Alternative Algorithm" and point to the correct PEMICRO flash algorithm (nxp_s32k344_1x32x980k_hse_enabled.arp).
- Disable "Load Symbols" and "Run on Reset" since this session is only for programming.
Program the Flash:
- Start the debug session. The .srec file will be loaded into the UTEST flash.
- After programming, verify the memory content in the Memory View.

nxp_s32k344_1x32x980k_hse_enabled.arp algorithm supports HSE-enabled devices and is suitable for UTEST flash programming.

I have never tried it by using PEMicro so I can't verify the steps from my experience.

Best regards,

Peter

Re: S32K344 Lock step core

yanyanwang — Wed, 14 Jan 2026 09:22:03 GMT

How can I erase the UTEST records, exit lockstep mode, and test the lockstep functionality?

Could you help me check if my current records are correct?

Thanks.@petervlna