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    <title>topic Re: Query on HSE Random Number Generation Performance and Initialization Handling for MCU0/MCU1 in S32K</title>
    <link>https://community.nxp.com/t5/S32K/Query-on-HSE-Random-Number-Generation-Performance-and/m-p/2188142#M53645</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/213894"&gt;@nitins25&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Unfortunately, there is no option to reduce this latency.&lt;BR /&gt;The function Crypto_43_HSE_Init does not address this delay. It performs pure software initialization of the Crypto driver and does not trigger any HSE services.&lt;BR /&gt;Regarding the deviation from GM CTRS timing requirements, I’m unable to provide a definitive answer. As a GM, you should have access to dedicated FAE support, either through the private GM community or via the NXP support portal: &lt;A href="https://support.nxp.com/s/?language=en_US" target="_blank"&gt;https://support.nxp.com/s/?language=en_US&lt;/A&gt;&lt;BR /&gt;I recommend using those channels to reach the appropriate team for further assistance.&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Lukas&lt;/P&gt;</description>
    <pubDate>Fri, 17 Oct 2025 08:24:19 GMT</pubDate>
    <dc:creator>lukaszadrapa</dc:creator>
    <dc:date>2025-10-17T08:24:19Z</dc:date>
    <item>
      <title>Query on HSE Random Number Generation Performance and Initialization Handling for MCU0/MCU1</title>
      <link>https://community.nxp.com/t5/S32K/Query-on-HSE-Random-Number-Generation-Performance-and/m-p/2187704#M53629</link>
      <description>&lt;P&gt;Hello NXP Team,&lt;/P&gt;&lt;P&gt;Based on our measurements on the &lt;STRONG&gt;S32K312&lt;/STRONG&gt; and &lt;STRONG&gt;S32S388 MCU0/MCU1&lt;/STRONG&gt; projects, we observed that the initial &lt;STRONG&gt;"Random Number Generate"&lt;/STRONG&gt; HSE service — which performs the internal seeding operation — takes approximately &lt;STRONG&gt;60 ms&lt;/STRONG&gt; to complete.&lt;/P&gt;&lt;P&gt;From the &lt;STRONG&gt;second iteration onward&lt;/STRONG&gt;, the response time reduces to around &lt;STRONG&gt;8 ms&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;We are using this service within the &lt;STRONG&gt;Security Access (0x27)&lt;/STRONG&gt; UDS routine, where the HSE generates and provides the random number.&lt;/P&gt;&lt;P&gt;As per our earlier discussion with NXP in one of the forums (see attached snippet), we understood that this delay is related to the HSE’s seeding process.&lt;/P&gt;&lt;P&gt;Could you please confirm:&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;P&gt;Whether any &lt;STRONG&gt;optimization&lt;/STRONG&gt; is possible to reduce the initial latency?&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;If this limitation must be accepted as is, would it be considered a &lt;STRONG&gt;deviation from the GM CTRS timing requirements&lt;/STRONG&gt;?&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;Is the &lt;STRONG&gt;RNG initialization (seeding)&lt;/STRONG&gt; handled automatically within &lt;STRONG&gt;Crypto_HSE_Init()&lt;/STRONG&gt;, or is the integrator expected to &lt;STRONG&gt;invoke it explicitly&lt;/STRONG&gt; during system initialization?&lt;/P&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;Thank you for your support.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Nitin&lt;/P&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 16 Oct 2025 17:38:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Query-on-HSE-Random-Number-Generation-Performance-and/m-p/2187704#M53629</guid>
      <dc:creator>nitins25</dc:creator>
      <dc:date>2025-10-16T17:38:30Z</dc:date>
    </item>
    <item>
      <title>Re: Query on HSE Random Number Generation Performance and Initialization Handling for MCU0/MCU1</title>
      <link>https://community.nxp.com/t5/S32K/Query-on-HSE-Random-Number-Generation-Performance-and/m-p/2188142#M53645</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/213894"&gt;@nitins25&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Unfortunately, there is no option to reduce this latency.&lt;BR /&gt;The function Crypto_43_HSE_Init does not address this delay. It performs pure software initialization of the Crypto driver and does not trigger any HSE services.&lt;BR /&gt;Regarding the deviation from GM CTRS timing requirements, I’m unable to provide a definitive answer. As a GM, you should have access to dedicated FAE support, either through the private GM community or via the NXP support portal: &lt;A href="https://support.nxp.com/s/?language=en_US" target="_blank"&gt;https://support.nxp.com/s/?language=en_US&lt;/A&gt;&lt;BR /&gt;I recommend using those channels to reach the appropriate team for further assistance.&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Fri, 17 Oct 2025 08:24:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Query-on-HSE-Random-Number-Generation-Performance-and/m-p/2188142#M53645</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2025-10-17T08:24:19Z</dc:date>
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