S32KのトピックRe: There is a microsecond level delay when capturing the input signal of S32K142W chip

There is a microsecond level delay when capturing the input signal of S32K142W chip

FAR1234 — Mon, 13 Oct 2025 01:15:29 GMT

Dear NXP experts,

Background of the problem:
MCU: S32K142W;
Application background: Configure FTM2 as capture mode to capture three-phase Hall signals for BLDC motor control.
Problem description: Adding an instruction to reverse GPIO at the input of the FTM2_Ch0uCh1_IRQHandler() interrupt function, it was found that the capture trigger time can be delayed by up to 3.2us compared to the captured signal. I only set the interrupt priority of "FTM2_Ch0_Ch1_IRQHandler" to the highest priority 0. As shown in the following

figure:

CH1 channel (yellow waveform): FTM2 captures interrupt reversal IO port;
CH2 channel (blue waveform): periodic square wave generated by the signal generator;

My FTM2 configuration is as follows:
Configure reference information, refer to this image:

Specific configuration information of FTM2:

Looking forward to your reply, thank you.

Re: There is a microsecond level delay when capturing the input signal of S32K142W chip

_Leo_ — Mon, 13 Oct 2025 21:23:53 GMT

Thank you for your interest in our products and for contributing to our community.

Could you please share you project using Real Time Drivers (RTD) and compatible with the S32K14WEVB-Q064 (or any other of our EVB) in order to reproduce your issue from our side?

In addition to the ICU configuration, please also add the necessary PWM settings to test all the issue in a single board. And any extra details that are necessary please.

Thank you in advance for details.

Re: There is a microsecond level delay when capturing the input signal of S32K142W chip

FAR1234 — Thu, 16 Oct 2025 01:02:27 GMT

Hi @_Leo_

I am glad to receive your reply.

Regarding your question, the response is as follows:

1, S32 Design Studio for S32 Platform Version: S32DS v3.4

2, SDK: S32SDK_S32K1XX_STM_4.0.3;
3, MCU:FS32K142WAT0WLFT;

4, For the input capture routine of Hall signal, I built it myself according to the prompts in the NXP user manual. For specific configuration, please refer to my last message.

5,Tested PWM signal properties:
Frequency: 20KHz;
Duty cycle: 50%;
High level voltage: 5V;

Best Regards