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    <title>S32KのトピックRe: S32K322 TCMs</title>
    <link>https://community.nxp.com/t5/S32K/S32K322-TCMs/m-p/2185514#M53522</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/244645"&gt;@Akshat_VE02376&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;CM7_0 has direct access to DTCM_0, while CM7_1 has direct access to DTCM_1.&lt;BR /&gt;CM7_1 cannot directly access DTCM_0; it can only do so via the backdoor interface&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielmartynek_0-1760430406233.png" style="width: 546px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/360632i81D91435A9845224/image-dimensions/546x296?v=v2" width="546" height="296" role="button" title="danielmartynek_0-1760430406233.png" alt="danielmartynek_0-1760430406233.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Each core (CM7_0 and CM7_1) has its own linker file and startup code, which allows for independent allocation of stack and memory regions.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Tue, 14 Oct 2025 08:33:00 GMT</pubDate>
    <dc:creator>danielmartynek</dc:creator>
    <dc:date>2025-10-14T08:33:00Z</dc:date>
    <item>
      <title>S32K322 TCMs</title>
      <link>https://community.nxp.com/t5/S32K/S32K322-TCMs/m-p/2185388#M53509</link>
      <description>&lt;P&gt;Hi NXP,&lt;BR /&gt;This is regarding the usage of DTCM-0 and DTCM-1 in S32K322.&lt;BR /&gt;In our current project we are having a single binary for both the cores which leads to the storage of all global variables which are mapped with DTCM, use up DTCM of core-0.&lt;BR /&gt;All the SafeOs task stacks are allocated to DTCM-0.&lt;BR /&gt;I have a few questions:&lt;BR /&gt;1. If TCB stacks of master core and slave core tasks are uninitialized and mapped to DTCM-0, then at runtime core-1's task would automatically use up dtcm-1 since both DTCMs have same address? If not-&amp;gt; follow point 2.&lt;BR /&gt;2. How exactly can we manually map the data section for slave core's stack to core-1's DTCM?&lt;/P&gt;</description>
      <pubDate>Tue, 14 Oct 2025 06:50:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K322-TCMs/m-p/2185388#M53509</guid>
      <dc:creator>Akshat_VE02376</dc:creator>
      <dc:date>2025-10-14T06:50:15Z</dc:date>
    </item>
    <item>
      <title>Re: S32K322 TCMs</title>
      <link>https://community.nxp.com/t5/S32K/S32K322-TCMs/m-p/2185514#M53522</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/244645"&gt;@Akshat_VE02376&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;CM7_0 has direct access to DTCM_0, while CM7_1 has direct access to DTCM_1.&lt;BR /&gt;CM7_1 cannot directly access DTCM_0; it can only do so via the backdoor interface&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielmartynek_0-1760430406233.png" style="width: 546px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/360632i81D91435A9845224/image-dimensions/546x296?v=v2" width="546" height="296" role="button" title="danielmartynek_0-1760430406233.png" alt="danielmartynek_0-1760430406233.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Each core (CM7_0 and CM7_1) has its own linker file and startup code, which allows for independent allocation of stack and memory regions.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 14 Oct 2025 08:33:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K322-TCMs/m-p/2185514#M53522</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2025-10-14T08:33:00Z</dc:date>
    </item>
    <item>
      <title>Re: S32K322 TCMs</title>
      <link>https://community.nxp.com/t5/S32K/S32K322-TCMs/m-p/2202298#M54345</link>
      <description>Hi Daniel,&lt;BR /&gt;Is there no way to have a single linker and use up core-1's (slave core) DTCM-1 when both cores are active?&lt;BR /&gt;I really need this clarification for a closure!!</description>
      <pubDate>Tue, 11 Nov 2025 03:19:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K322-TCMs/m-p/2202298#M54345</guid>
      <dc:creator>Akshat_VE02376</dc:creator>
      <dc:date>2025-11-11T03:19:28Z</dc:date>
    </item>
    <item>
      <title>Re: S32K322 TCMs</title>
      <link>https://community.nxp.com/t5/S32K/S32K322-TCMs/m-p/2202759#M54370</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/244645"&gt;@Akshat_VE02376&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Yes, that is possible.&lt;/P&gt;
&lt;P&gt;In RTD 2.0.0, there was this example:&amp;nbsp;Platform_Multicore_SingleElf_S32K324&lt;/P&gt;
&lt;P&gt;The example has just one linker file.&lt;/P&gt;
&lt;P&gt;Install S32DS 3.4 and add RTD 2.0.0 so that you can create a project from that example.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
      <pubDate>Tue, 11 Nov 2025 13:28:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K322-TCMs/m-p/2202759#M54370</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2025-11-11T13:28:44Z</dc:date>
    </item>
    <item>
      <title>Re: S32K322 TCMs</title>
      <link>https://community.nxp.com/t5/S32K/S32K322-TCMs/m-p/2202760#M54371</link>
      <description>Hi Daniel,&lt;BR /&gt;Can you please provide me with the corresponding link?</description>
      <pubDate>Tue, 11 Nov 2025 13:37:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K322-TCMs/m-p/2202760#M54371</guid>
      <dc:creator>Akshat_VE02376</dc:creator>
      <dc:date>2025-11-11T13:37:02Z</dc:date>
    </item>
    <item>
      <title>Re: S32K322 TCMs</title>
      <link>https://community.nxp.com/t5/S32K/S32K322-TCMs/m-p/2203502#M54398</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/244645"&gt;@Akshat_VE02376&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;S32DS 3.4 IDE can be downloaded here:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/design/design-center/software/automotive-software-and-tools/s32-design-studio-ide/s32-design-studio-for-s32-platform:S32DS-S32PLATFORM" target="_blank"&gt;https://www.nxp.com/design/design-center/software/automotive-software-and-tools/s32-design-studio-ide/s32-design-studio-for-s32-platform:S32DS-S32PLATFORM&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;The RTD is a part of the S32K3xx Standard SW:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/webapp/swlicensing/sso/downloadSoftware.sp?catid=SW32K3-STDSW-D" target="_blank"&gt;https://www.nxp.com/webapp/swlicensing/sso/downloadSoftware.sp?catid=SW32K3-STDSW-D&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 12 Nov 2025 09:56:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K322-TCMs/m-p/2203502#M54398</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2025-11-12T09:56:01Z</dc:date>
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