S32KのトピックRe: HardFault exception - configuring EEEPROM Functionality

HardFault exception - configuring EEEPROM Functionality

Alberto_C — Tue, 07 Oct 2025 16:26:48 GMT

Hello

I'm currently working with S32K144 , I'm trying to configure EEEPROM Functionality with no SDK but during my SW execution I'm getting a hardfault exception.

here is my code configuration:

/* Clear RDCOLERR & ACCERR & FPVIOL & MGSTAT0 flag in flash status register. Write 1 to clear */
IP_FTFC->FSTAT = (uint8_t)(FTFC_FSTAT_FPVIOL_MASK | FTFC_FSTAT_ACCERR_MASK | FTFC_FSTAT_RDCOLERR_MASK);

/* The program partition command configures FlexRAM as EEPROM and FlexNVM as EEPROM backup region */
IP_FTFC-> FCCOB [3] = 0x80; /* FCCOB0: Selects the PGMPART command */
IP_FTFC-> FCCOB [2] = 0x00; /* FCCOB1: No CSEc operation */
IP_FTFC-> FCCOB [1] = 0x00; /* FCCOB2: No CSEc operation */
IP_FTFC-> FCCOB [0] = 0x00; /* FCCOB3: FlexRAM loaded with valid EEPROM during reset sequence */
IP_FTFC-> FCCOB [7] = 0x02; /* FCCOB4: EEPROM data set size code: EEESIZE = 2 (4 kB) */
IP_FTFC-> FCCOB [6] = 0x04; /* FCCOB5: FlexNVM Partition code: DEPART = 4 (Data flash: 0 kB, EEPROM backup: 64 kB) */

/* Enable the command complete interrupt */
IP_FTFC->FCNFG |= FTFC_FCNFG_CCIE_MASK;
/* Clear CCIF bit by writing a '1' to launch command */
IP_FTFC->FSTAT |= FTFC_FSTAT_CCIF_MASK;

/* Clear RDCOLERR & ACCERR & FPVIOL & MGSTAT0 flag in flash status register. Write 1 to clear */
IP_FTFC->FSTAT = (uint8_t)(FTFC_FSTAT_FPVIOL_MASK | FTFC_FSTAT_ACCERR_MASK | FTFC_FSTAT_RDCOLERR_MASK);

/* FlexRAM Function command changes the function of the FlexRAM */
IP_FTFC-> FCCOB [3] = 0x81; /* FCCOB0: Selects the SETRAM command */
IP_FTFC-> FCCOB [2] = 0x00; /* FCCOB1: Make FlexRAM available for emulated EEPROM */

/* Enable the command complete interrupt */
IP_FTFC->FCNFG |= FTFC_FCNFG_CCIE_MASK;
/* Clear CCIF bit by writing a '1' to launch command */
IP_FTFC->FSTAT |= FTFC_FSTAT_CCIF_MASK;

Also I have enable the FTFC interrupt in the NVIC and Interrupt Service Routine to handle the command completion event.

Any idea on what the issue is ? should I configure in a separate functions the Program Partition command and set FlexRAM ?

Thanks
Alberto

Re: HardFault exception - configuring EEEPROM Functionality

Alberto_C — Tue, 07 Oct 2025 19:25:38 GMT

I have noticed that the issue occurs here:
/* Clear CCIF bit by writing a '1' to launch command */
IP_FTFC->FSTAT |= FTFC_FSTAT_CCIF_MASK;

I'm handling the command complete interrupt in ISR but I can not reach that part of code since the hardfault happens inmediatly after the command is launch.
Does anyone have any idea on how to solve it ?

Re: HardFault exception - configuring EEEPROM Functionality

danielmartynek — Thu, 09 Oct 2025 11:18:24 GMT

Hi @Alberto_C,

It must be partitioned from SRAM.

This code must be in SRAM:

FTFC->FSTAT = FTFC_FSTAT_CCIF_MASK; // launch command while((FTFC->FSTAT & FTFC_FSTAT_CCIF_MASK) == 0); // wait until complete

Place the code into a function and the function place in SRAM:

__attribute__ ((section(".code_ram"))) // place the function below into .code_ram uint8_t partition(void);

If you use the FTFC interrupt, the core must not read any data or execute any code from the Flash.

Regards,

Daniel

Re: HardFault exception - configuring EEEPROM Functionality

Alberto_C — Wed, 08 Oct 2025 17:00:48 GMT

Hi Daniel, thanks for your reply.

I have create a function and put it into the SRAM but I'm still getting the Hardfault exception.

here is my code:
__attribute__((section (".code_ram")))
void execute_command(void);

void execute_command(void)
{
IP_FTFC->FSTAT |= FTFC_FSTAT_CCIF_MASK;
while ((IP_FTFC->FSTAT & FTFC_FSTAT_CCIF_MASK) == 0);
}

Note: I disabled the FTFC interrupt.

While debugging I noticed that there is warning icon in the function saying " value may be incorrect : runtime code areas(RAM) not yet initialized"
Am I missing something ?

Thanks
Alberto

Re: HardFault exception - configuring EEEPROM Functionality

Alberto_C — Wed, 08 Oct 2025 22:59:03 GMT

Hi Daniel, quick update on this topic.

I have enabled the FTFC interrupt and put it into the SRAM but I'm still getting the Hardfault exception. ( see the image below)
The HardFault happens when the execute_command function is being executed ( HardFault exception at 0x1FFF8424)

here is my linker configuration:

Flash:

RAM:

Am I missing something in the linker configuration ?

Is it mandatory to enable the FTFC interrupt ?

Thanks
Alberto

Re: HardFault exception - configuring EEEPROM Functionality

danielmartynek — Thu, 09 Oct 2025 11:17:20 GMT

Hi @Alberto_C,

Regarding the interrupt, please disregard my previous response.
The issue here is that during the command operation, the core must not execute any code from flash memory. This limitation makes it impractical to use interrupt mode for partitioning. Instead, polling mode should be used. Partitioning should be done only once during the device’s lifetime anyway.

Regards,

Daniel

Re: HardFault exception - configuring EEEPROM Functionality

Alberto_C — Thu, 09 Oct 2025 14:27:03 GMT

Hi Daniel, thanks for your reply.

Using the polling mode and execute the command from SRAM , I'm still getting the hardfault,
Strangely this does not happen, when I step through the program line by line (debugging the sw execution). Then the configuration for FlexRAM as EEPROM and FlexNVM as EEPROM backupp gets programmed correctly.
any missing configuration ?

How can the partition be reverted ? - I'm testing my code , but with the hardfault I can not perform any write testing.

Thanks for your support.
Alberto