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    <title>topic Re: Nxp S32k312 CAN bit timing parameters Issue in S32K</title>
    <link>https://community.nxp.com/t5/S32K/Nxp-S32k312-CAN-bit-timing-parameters-Issue/m-p/2169744#M52685</link>
    <description>&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;
&lt;P&gt;you can try below tool for CAN bit timing parameter calculation;&lt;BR /&gt;&lt;A href="https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/MPC5xxx-S32Kxx-LPCxxxx-CAN-CAN-FD-bit-timing-calculation/ta-p/1119319" target="_blank"&gt;https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/MPC5xxx-S32Kxx-LPCxxxx-CAN-CAN-FD-bit-timing-calculation/ta-p/1119319&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Also see some hints below...&lt;BR /&gt;- If possible, select same prescalers for both nominal and data phases. &lt;BR /&gt;- If have TDC enabled, try to disable it as it is not needed for this rates. &lt;BR /&gt;- Be sure all node use same CAN protocol (non-ISO vs ISO CANFD). &lt;BR /&gt;- Have bus properly terminated.&lt;/P&gt;
&lt;P&gt;BR, Petr&lt;/P&gt;</description>
    <pubDate>Mon, 15 Sep 2025 13:46:15 GMT</pubDate>
    <dc:creator>PetrS</dc:creator>
    <dc:date>2025-09-15T13:46:15Z</dc:date>
    <item>
      <title>Nxp S32k312 CAN bit timing parameters Issue</title>
      <link>https://community.nxp.com/t5/S32K/Nxp-S32k312-CAN-bit-timing-parameters-Issue/m-p/2169707#M52684</link>
      <description>&lt;P&gt;Hi,&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37795"&gt;@lukaszadrapa&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are using the &lt;STRONG&gt;FlexCAN0 module&lt;/STRONG&gt; for CAN communication. To configure the baud rate, we are using &lt;STRONG&gt;bit timing parameters&lt;/STRONG&gt;.&lt;/P&gt;&lt;H3&gt;Configuration Details&lt;/H3&gt;&lt;TABLE width="438.124981880188px"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD width="122.292px"&gt;&lt;STRONG&gt;Device&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="133.523px"&gt;&lt;STRONG&gt;S32K3xx - CAN FD&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="132.367px"&gt;&lt;STRONG&gt;fpe_clk [MHz]&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="49.3371px"&gt;&lt;STRONG&gt;40&lt;/STRONG&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD width="122.292px"&gt;&lt;STRONG&gt;Transceiver&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="133.523px"&gt;&lt;STRONG&gt;TJA1046&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="132.367px"&gt;&lt;STRONG&gt;bitrate [kbps]&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="49.3371px"&gt;&lt;STRONG&gt;500&lt;/STRONG&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD width="122.292px"&gt;&lt;STRONG&gt;propTXRX [ns]&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="133.523px"&gt;&lt;STRONG&gt;150&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="132.367px"&gt;&lt;STRONG&gt;bitrate FD [kbps]&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="49.3371px"&gt;&lt;STRONG&gt;2000&lt;/STRONG&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD width="122.292px"&gt;&lt;STRONG&gt;bus length [m]&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="133.523px"&gt;&lt;STRONG&gt;40&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="132.367px"&gt;&lt;STRONG&gt;samp. point [%]&lt;/STRONG&gt;&lt;/TD&gt;&lt;TD width="49.3371px"&gt;&lt;STRONG&gt;90&lt;/STRONG&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Our requirement is to achieve a &lt;STRONG&gt;tolerance of ≤ 0.4%&lt;/STRONG&gt; for the following parameters:&lt;/P&gt;&lt;H4&gt;1. &lt;STRONG&gt;Nominal Bitrate: 500 kbps&lt;/STRONG&gt;&lt;/H4&gt;&lt;UL&gt;&lt;LI&gt;&lt;P&gt;Prescaler: 4&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;PropSeg: 7&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;PhaseSeg1: 10&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;PhaseSeg2: 2&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;RJW: 2&lt;/P&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;H4&gt;2. &lt;STRONG&gt;Data Bitrate (for BRS): 2000 kbps&lt;/STRONG&gt;&lt;/H4&gt;&lt;UL&gt;&lt;LI&gt;&lt;P&gt;Prescaler: 1&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;PropSeg: 7&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;PhaseSeg1: 6&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;PhaseSeg2: 6&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;RJW: 6&lt;/P&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;H3&gt;Issue Description&lt;/H3&gt;&lt;P&gt;The CAN communication works correctly without &lt;STRONG&gt;Bit Rate Switching (BRS)&lt;/STRONG&gt;. However, when BRS is enabled, we encounter &lt;STRONG&gt;TX errors&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;We are using an &lt;STRONG&gt;FXOSC input clock of 40 MHz&lt;/STRONG&gt; for the CAN module.&lt;/P&gt;&lt;P&gt;Could you please help us fine-tune the bit timing parameters to achieve a &lt;STRONG&gt;tolerance ≤ 0.4%&lt;/STRONG&gt; with &lt;STRONG&gt;BRS enabled&lt;/STRONG&gt;, using the 40 MHz FXOSC input clock?&lt;/P&gt;</description>
      <pubDate>Mon, 15 Sep 2025 12:05:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Nxp-S32k312-CAN-bit-timing-parameters-Issue/m-p/2169707#M52684</guid>
      <dc:creator>Anitha7</dc:creator>
      <dc:date>2025-09-15T12:05:27Z</dc:date>
    </item>
    <item>
      <title>Re: Nxp S32k312 CAN bit timing parameters Issue</title>
      <link>https://community.nxp.com/t5/S32K/Nxp-S32k312-CAN-bit-timing-parameters-Issue/m-p/2169744#M52685</link>
      <description>&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;
&lt;P&gt;you can try below tool for CAN bit timing parameter calculation;&lt;BR /&gt;&lt;A href="https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/MPC5xxx-S32Kxx-LPCxxxx-CAN-CAN-FD-bit-timing-calculation/ta-p/1119319" target="_blank"&gt;https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/MPC5xxx-S32Kxx-LPCxxxx-CAN-CAN-FD-bit-timing-calculation/ta-p/1119319&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Also see some hints below...&lt;BR /&gt;- If possible, select same prescalers for both nominal and data phases. &lt;BR /&gt;- If have TDC enabled, try to disable it as it is not needed for this rates. &lt;BR /&gt;- Be sure all node use same CAN protocol (non-ISO vs ISO CANFD). &lt;BR /&gt;- Have bus properly terminated.&lt;/P&gt;
&lt;P&gt;BR, Petr&lt;/P&gt;</description>
      <pubDate>Mon, 15 Sep 2025 13:46:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Nxp-S32k312-CAN-bit-timing-parameters-Issue/m-p/2169744#M52685</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2025-09-15T13:46:15Z</dc:date>
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