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    <title>topic S32K312 SPI+DMA AsyncTransmit in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K312-SPI-DMA-AsyncTransmit/m-p/2152040#M51834</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;使用SPI读取外部Flash数据，由于数据量比较大，采用了SPI+DMA异步传输方式,创建了2个channel，第一个channel为flash的commander，一个4个字节，第二个channel为25600个字节，用于回读Flash的数据。DMA用了4个通道，ch0/ch1用于UART, ch2/ch3用于本配置的SPI，未使用本配置的SPI时，UART是可以正常发送的，配置了SPI后，UART和SPI均无法正常工作。&lt;/P&gt;&lt;P&gt;Platform模块配置如下：&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_10-1755146984231.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352354i81D5EA23135CDC9F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_10-1755146984231.png" alt="ben_chin_10-1755146984231.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Mcl模块DMA配置如下：&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_0-1755143805958.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352338i9E859832FA88025F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_0-1755143805958.png" alt="ben_chin_0-1755143805958.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_1-1755143849674.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352340iC570C7C2280A49AA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_1-1755143849674.png" alt="ben_chin_1-1755143849674.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Rm模块配置如下：&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_2-1755143934882.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352341iAB1E78A0C93D3716/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_2-1755143934882.png" alt="ben_chin_2-1755143934882.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Spi模块配置如下：&lt;/P&gt;&lt;P&gt;channel部分&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_3-1755146506318.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352347i3B0F5DE1D5914A84/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_3-1755146506318.png" alt="ben_chin_3-1755146506318.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_4-1755146530193.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352348i05BB28F0DB0437C0/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_4-1755146530193.png" alt="ben_chin_4-1755146530193.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;ExternalDevice部分&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_5-1755146568667.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352349i54CC81E0225F5B54/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_5-1755146568667.png" alt="ben_chin_5-1755146568667.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Job部分&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_6-1755146631080.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352350i77DDB646CB60B9AD/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_6-1755146631080.png" alt="ben_chin_6-1755146631080.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Sequency部分&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_7-1755146685150.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352351i5F44957434B63374/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_7-1755146685150.png" alt="ben_chin_7-1755146685150.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;general和PhyUnit&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_9-1755146836334.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352353i2D01751BF4FD637A/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_9-1755146836334.png" alt="ben_chin_9-1755146836334.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;代码如下：&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt; &lt;SPAN&gt;SPI_START_SEC_VAR_INIT_UNSPECIFIED&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Spi_MemMap.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;__attribute__&lt;/SPAN&gt;&lt;SPAN&gt;(( &lt;/SPAN&gt;&lt;SPAN&gt;aligned&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;32&lt;/SPAN&gt;&lt;SPAN&gt;) )) &lt;/SPAN&gt;&lt;SPAN&gt;uint8_t&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;nvmTxMsg&lt;/SPAN&gt;&lt;SPAN&gt;[&lt;/SPAN&gt;&lt;SPAN&gt;4&lt;/SPAN&gt;&lt;SPAN&gt;] &lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt; {&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;__attribute__&lt;/SPAN&gt;&lt;SPAN&gt;(( &lt;/SPAN&gt;&lt;SPAN&gt;aligned&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;32&lt;/SPAN&gt;&lt;SPAN&gt;) )) &lt;/SPAN&gt;&lt;SPAN&gt;uint8_t&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;nvmRxMsg&lt;/SPAN&gt;&lt;SPAN&gt;[&lt;/SPAN&gt;&lt;SPAN&gt;NVM_DEV_NUM&lt;/SPAN&gt;&lt;SPAN&gt;] &lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt; {&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt; &lt;SPAN&gt;SPI_STOP_SEC_VAR_INIT_UNSPECIFIED&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Spi_MemMap.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;void&lt;/SPAN&gt; &lt;SPAN&gt;Nvm_hal_Init&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;void&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Initialize the hardware abstraction layer for the device */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;//Spi_SetHWUnitAsyncMode(2,SPI_INTERRUPT_MODE);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Spi_SetupEB&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;NVMCMD_SPI_CHANNEL&lt;/SPAN&gt;&lt;SPAN&gt;, nvmTxMsg, &lt;/SPAN&gt;&lt;SPAN&gt;NULL&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;4&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Spi_SetupEB&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;NVMDATA_SPI_CHANNEL&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;NULL&lt;/SPAN&gt;&lt;SPAN&gt;, nvmRxMsg, &lt;/SPAN&gt;&lt;SPAN&gt;NVM_DEV_NUM&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;void&lt;/SPAN&gt; &lt;SPAN&gt;Nvm_SpiTransfer&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;void&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Perform SPI synchronous transmission */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;nvmTxMsg&lt;/SPAN&gt;&lt;SPAN&gt;[&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;] &lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0x03u&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;nvmTxMsg&lt;/SPAN&gt;&lt;SPAN&gt;[&lt;/SPAN&gt;&lt;SPAN&gt;1&lt;/SPAN&gt;&lt;SPAN&gt;] &lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0x00u&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;nvmTxMsg&lt;/SPAN&gt;&lt;SPAN&gt;[&lt;/SPAN&gt;&lt;SPAN&gt;2&lt;/SPAN&gt;&lt;SPAN&gt;] &lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0x00u&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;nvmTxMsg&lt;/SPAN&gt;&lt;SPAN&gt;[&lt;/SPAN&gt;&lt;SPAN&gt;3&lt;/SPAN&gt;&lt;SPAN&gt;] &lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0x00u&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;//Dio_WriteChannel(DioConf_DioChannel_SideMarkerEnableOut,0);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Spi_AsyncTransmit&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;NVM_SPI_SEQUENCE&lt;/SPAN&gt;&lt;SPAN&gt;); &amp;nbsp; &lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;uint32_t&lt;/SPAN&gt; &lt;SPAN&gt;nvm&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;void&lt;/SPAN&gt; &lt;SPAN&gt;NvmSpi_Callback&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;void&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;nvm&lt;/SPAN&gt;&lt;SPAN&gt;++&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;//Dio_WriteChannel(DioConf_DioChannel_SideMarkerEnableOut,1);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 14 Aug 2025 04:52:12 GMT</pubDate>
    <dc:creator>ben_chin</dc:creator>
    <dc:date>2025-08-14T04:52:12Z</dc:date>
    <item>
      <title>S32K312 SPI+DMA AsyncTransmit</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-SPI-DMA-AsyncTransmit/m-p/2152040#M51834</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;使用SPI读取外部Flash数据，由于数据量比较大，采用了SPI+DMA异步传输方式,创建了2个channel，第一个channel为flash的commander，一个4个字节，第二个channel为25600个字节，用于回读Flash的数据。DMA用了4个通道，ch0/ch1用于UART, ch2/ch3用于本配置的SPI，未使用本配置的SPI时，UART是可以正常发送的，配置了SPI后，UART和SPI均无法正常工作。&lt;/P&gt;&lt;P&gt;Platform模块配置如下：&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_10-1755146984231.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352354i81D5EA23135CDC9F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_10-1755146984231.png" alt="ben_chin_10-1755146984231.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Mcl模块DMA配置如下：&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_0-1755143805958.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352338i9E859832FA88025F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_0-1755143805958.png" alt="ben_chin_0-1755143805958.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_1-1755143849674.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352340iC570C7C2280A49AA/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_1-1755143849674.png" alt="ben_chin_1-1755143849674.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Rm模块配置如下：&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_2-1755143934882.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352341iAB1E78A0C93D3716/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_2-1755143934882.png" alt="ben_chin_2-1755143934882.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Spi模块配置如下：&lt;/P&gt;&lt;P&gt;channel部分&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_3-1755146506318.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352347i3B0F5DE1D5914A84/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_3-1755146506318.png" alt="ben_chin_3-1755146506318.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_4-1755146530193.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352348i05BB28F0DB0437C0/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_4-1755146530193.png" alt="ben_chin_4-1755146530193.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;ExternalDevice部分&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_5-1755146568667.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352349i54CC81E0225F5B54/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_5-1755146568667.png" alt="ben_chin_5-1755146568667.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Job部分&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_6-1755146631080.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352350i77DDB646CB60B9AD/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_6-1755146631080.png" alt="ben_chin_6-1755146631080.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Sequency部分&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_7-1755146685150.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352351i5F44957434B63374/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_7-1755146685150.png" alt="ben_chin_7-1755146685150.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;general和PhyUnit&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ben_chin_9-1755146836334.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/352353i2D01751BF4FD637A/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ben_chin_9-1755146836334.png" alt="ben_chin_9-1755146836334.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;代码如下：&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt; &lt;SPAN&gt;SPI_START_SEC_VAR_INIT_UNSPECIFIED&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Spi_MemMap.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;__attribute__&lt;/SPAN&gt;&lt;SPAN&gt;(( &lt;/SPAN&gt;&lt;SPAN&gt;aligned&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;32&lt;/SPAN&gt;&lt;SPAN&gt;) )) &lt;/SPAN&gt;&lt;SPAN&gt;uint8_t&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;nvmTxMsg&lt;/SPAN&gt;&lt;SPAN&gt;[&lt;/SPAN&gt;&lt;SPAN&gt;4&lt;/SPAN&gt;&lt;SPAN&gt;] &lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt; {&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;__attribute__&lt;/SPAN&gt;&lt;SPAN&gt;(( &lt;/SPAN&gt;&lt;SPAN&gt;aligned&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;32&lt;/SPAN&gt;&lt;SPAN&gt;) )) &lt;/SPAN&gt;&lt;SPAN&gt;uint8_t&lt;/SPAN&gt;&lt;SPAN&gt; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;nvmRxMsg&lt;/SPAN&gt;&lt;SPAN&gt;[&lt;/SPAN&gt;&lt;SPAN&gt;NVM_DEV_NUM&lt;/SPAN&gt;&lt;SPAN&gt;] &lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt;&lt;SPAN&gt; {&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#define&lt;/SPAN&gt; &lt;SPAN&gt;SPI_STOP_SEC_VAR_INIT_UNSPECIFIED&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;#include&lt;/SPAN&gt; &lt;SPAN&gt;"Spi_MemMap.h"&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;void&lt;/SPAN&gt; &lt;SPAN&gt;Nvm_hal_Init&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;void&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Initialize the hardware abstraction layer for the device */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;//Spi_SetHWUnitAsyncMode(2,SPI_INTERRUPT_MODE);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Spi_SetupEB&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;NVMCMD_SPI_CHANNEL&lt;/SPAN&gt;&lt;SPAN&gt;, nvmTxMsg, &lt;/SPAN&gt;&lt;SPAN&gt;NULL&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;4&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Spi_SetupEB&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;NVMDATA_SPI_CHANNEL&lt;/SPAN&gt;&lt;SPAN&gt;, &lt;/SPAN&gt;&lt;SPAN&gt;NULL&lt;/SPAN&gt;&lt;SPAN&gt;, nvmRxMsg, &lt;/SPAN&gt;&lt;SPAN&gt;NVM_DEV_NUM&lt;/SPAN&gt;&lt;SPAN&gt;);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;void&lt;/SPAN&gt; &lt;SPAN&gt;Nvm_SpiTransfer&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;void&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; /* Perform SPI synchronous transmission */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;nvmTxMsg&lt;/SPAN&gt;&lt;SPAN&gt;[&lt;/SPAN&gt;&lt;SPAN&gt;0&lt;/SPAN&gt;&lt;SPAN&gt;] &lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0x03u&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;nvmTxMsg&lt;/SPAN&gt;&lt;SPAN&gt;[&lt;/SPAN&gt;&lt;SPAN&gt;1&lt;/SPAN&gt;&lt;SPAN&gt;] &lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0x00u&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;nvmTxMsg&lt;/SPAN&gt;&lt;SPAN&gt;[&lt;/SPAN&gt;&lt;SPAN&gt;2&lt;/SPAN&gt;&lt;SPAN&gt;] &lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0x00u&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;nvmTxMsg&lt;/SPAN&gt;&lt;SPAN&gt;[&lt;/SPAN&gt;&lt;SPAN&gt;3&lt;/SPAN&gt;&lt;SPAN&gt;] &lt;/SPAN&gt;&lt;SPAN&gt;=&lt;/SPAN&gt; &lt;SPAN&gt;0x00u&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;//Dio_WriteChannel(DioConf_DioChannel_SideMarkerEnableOut,0);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;Spi_AsyncTransmit&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;NVM_SPI_SEQUENCE&lt;/SPAN&gt;&lt;SPAN&gt;); &amp;nbsp; &lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;uint32_t&lt;/SPAN&gt; &lt;SPAN&gt;nvm&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;void&lt;/SPAN&gt; &lt;SPAN&gt;NvmSpi_Callback&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;void&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;nvm&lt;/SPAN&gt;&lt;SPAN&gt;++&lt;/SPAN&gt;&lt;SPAN&gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;//Dio_WriteChannel(DioConf_DioChannel_SideMarkerEnableOut,1);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 14 Aug 2025 04:52:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-SPI-DMA-AsyncTransmit/m-p/2152040#M51834</guid>
      <dc:creator>ben_chin</dc:creator>
      <dc:date>2025-08-14T04:52:12Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312 SPI+DMA AsyncTransmit</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-SPI-DMA-AsyncTransmit/m-p/2152630#M51851</link>
      <description>&lt;P&gt;&lt;A href="mailto:Hi@ben_chin" target="_blank"&gt;Hi@ben_chin&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;附件是我之前做的一些demo，分别是SPI+DMA以及Uart+DMA，两个demo的RTD版本分别是RTD 5.0.0和RTD 4.0.0，请你参考这两个demo进行对比修改。&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 15 Aug 2025 03:07:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-SPI-DMA-AsyncTransmit/m-p/2152630#M51851</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2025-08-15T03:07:23Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312 SPI+DMA AsyncTransmit</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-SPI-DMA-AsyncTransmit/m-p/2152681#M51853</link>
      <description>&lt;P&gt;已解决，谢谢！&lt;/P&gt;</description>
      <pubDate>Fri, 15 Aug 2025 04:44:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-SPI-DMA-AsyncTransmit/m-p/2152681#M51853</guid>
      <dc:creator>ben_chin</dc:creator>
      <dc:date>2025-08-15T04:44:36Z</dc:date>
    </item>
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