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    <title>topic Re: Ethernet initialisation issues in AVTP project in S32K</title>
    <link>https://community.nxp.com/t5/S32K/Ethernet-initialisation-issues-in-AVTP-project/m-p/2149182#M51706</link>
    <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/243530"&gt;@ssattva1&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;I have successfully run RGMII with the TJA1103-SDBR on the S32K3X8EVB-Q289.&lt;/P&gt;
&lt;P&gt;However, RMII requires some hardware modifications to the board. For details, please refer to section 13.2 of the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;EM&gt;S32K3X8EVB-Q289 Hardware User Manual&lt;/EM&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;(S32K3X8EVB-Q289HWUM.pdf).&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Pavel&lt;/P&gt;</description>
    <pubDate>Fri, 08 Aug 2025 11:43:31 GMT</pubDate>
    <dc:creator>PavelL</dc:creator>
    <dc:date>2025-08-08T11:43:31Z</dc:date>
    <item>
      <title>Ethernet initialisation issues in AVTP project</title>
      <link>https://community.nxp.com/t5/S32K/Ethernet-initialisation-issues-in-AVTP-project/m-p/2149081#M51703</link>
      <description>&lt;P&gt;I am working on AVTP implementation using AVB stack provided by NXP&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ssattva1_0-1754643186207.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/351549i200946C26275D1AD/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ssattva1_0-1754643186207.png" alt="ssattva1_0-1754643186207.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;I am specifically working on s32k358_baremetal_acf_example project and I am facing issues after flashing the elf. I did not face any issues with building the project (make sure RTD version is 4.0 , not 5.0). My ethernet module initialisation is not getting done after flashing.&lt;BR /&gt;&lt;BR /&gt;Issues:&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Program goes to HW fault immediately after flashing , reason being "&amp;nbsp;MemManage: The processor attempted an instruction fetch from a location that does not permit execution. HardFault: A fault has been escalated to a hard fault." After clicking reset button in the debug window then it enters into main.c&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ssattva1_1-1754643620648.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/351551i3122D9204BA0430B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ssattva1_1-1754643620648.png" alt="ssattva1_1-1754643620648.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;In the function&amp;nbsp;EMACLLD_ClockInit_HwSwitch() , the clock switch is not happening and upon observing the registers&amp;nbsp; I come to know that the clock switch request fails and FIRC is the source instead of EMAC_EXTERNAL_TX_RMII. "&lt;SPAN&gt;010b - Switch after the request failed because of an inactive target clock and the current clock is FIRC."&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ssattva1_0-1754643881076.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/351553i31C9733BFBC2795D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ssattva1_0-1754643881076.png" alt="ssattva1_0-1754643881076.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Upon further digging , I decide to compare it with LWIP baremetal project . The above registers show success after Clock_Ip_Init () in device_init(), not so the case with AVTP project.&amp;nbsp; I am using the same board and PHY , yet I dont know why it shows target clock inactive when it comes to AVTP project.&lt;/LI&gt;&lt;LI&gt;Even if I comment out the&amp;nbsp;EMACLLD_ClockInit_HwSwitch() function and make appropriate clock configs in the peripheral tool , it again gets stuck at DMA init&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ssattva1_1-1754644217547.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/351554i8C43CFA6C5ED2697/image-size/medium?v=v2&amp;amp;px=400" role="button" title="ssattva1_1-1754644217547.png" alt="ssattva1_1-1754644217547.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Please help me resolve this blocker.&lt;BR /&gt;HW USED: S32K358 eval board&lt;BR /&gt;PHY : ADTJA1101-RMII&lt;/LI&gt;&lt;/UL&gt;</description>
      <pubDate>Fri, 08 Aug 2025 09:11:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Ethernet-initialisation-issues-in-AVTP-project/m-p/2149081#M51703</guid>
      <dc:creator>ssattva1</dc:creator>
      <dc:date>2025-08-08T09:11:16Z</dc:date>
    </item>
    <item>
      <title>Re: Ethernet initialisation issues in AVTP project</title>
      <link>https://community.nxp.com/t5/S32K/Ethernet-initialisation-issues-in-AVTP-project/m-p/2149182#M51706</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/243530"&gt;@ssattva1&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;I have successfully run RGMII with the TJA1103-SDBR on the S32K3X8EVB-Q289.&lt;/P&gt;
&lt;P&gt;However, RMII requires some hardware modifications to the board. For details, please refer to section 13.2 of the&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;EM&gt;S32K3X8EVB-Q289 Hardware User Manual&lt;/EM&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;(S32K3X8EVB-Q289HWUM.pdf).&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Pavel&lt;/P&gt;</description>
      <pubDate>Fri, 08 Aug 2025 11:43:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Ethernet-initialisation-issues-in-AVTP-project/m-p/2149182#M51706</guid>
      <dc:creator>PavelL</dc:creator>
      <dc:date>2025-08-08T11:43:31Z</dc:date>
    </item>
    <item>
      <title>Re: Ethernet initialisation issues in AVTP project</title>
      <link>https://community.nxp.com/t5/S32K/Ethernet-initialisation-issues-in-AVTP-project/m-p/2149790#M51723</link>
      <description>Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/233505"&gt;@PavelL&lt;/a&gt; , Lwip example works without making those changes in HW for RMII.&lt;BR /&gt;I found this thing recently, when I probe into resistor 65 in ADTJA1101, which is the resistor along REFCLK, the voltage level is around 2V for LWIP project , but it drops down to 1V as soon as I run AVTP project. Could you help me with this?&lt;BR /&gt;</description>
      <pubDate>Mon, 11 Aug 2025 06:52:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Ethernet-initialisation-issues-in-AVTP-project/m-p/2149790#M51723</guid>
      <dc:creator>ssattva1</dc:creator>
      <dc:date>2025-08-11T06:52:56Z</dc:date>
    </item>
    <item>
      <title>Re: Ethernet initialisation issues in AVTP project</title>
      <link>https://community.nxp.com/t5/S32K/Ethernet-initialisation-issues-in-AVTP-project/m-p/2152101#M51836</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/243530"&gt;@ssattva1&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;I apologize for the delayed response — I was on vacation.&lt;/P&gt;
&lt;P&gt;It's great to hear that the LWIP example works for you.&lt;/P&gt;
&lt;P&gt;Regarding the voltage drop on REFCLK, this seems like a hardware conflict. Please verify that the RMII pin configuration matches between the LWIP example and your AVTP project. Specifically, the emac_mii_rmii_tx_clk pin should be configured as input.&lt;/P&gt;
&lt;P&gt;In other words, since one example works, I recommend comparing its configuration with the other project to identify any discrepancies.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Pavel&lt;/P&gt;</description>
      <pubDate>Thu, 14 Aug 2025 07:02:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Ethernet-initialisation-issues-in-AVTP-project/m-p/2152101#M51836</guid>
      <dc:creator>PavelL</dc:creator>
      <dc:date>2025-08-14T07:02:32Z</dc:date>
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