Media clock generation using eDMA

sathishkumar_sunmugavel — Wed, 23 Jul 2025 11:56:11 GMT

Hello Everyone,

I’m working on generating a clock using the GMAC PPS module along with eDMA.

From the documentation, I understand that the mcgr_dma_req_o[3:0] signal gets asserted when the GMAC system time is greater than or equal to the configured target time.

My goal is to use this signal to trigger eDMA to automatically update the next target time by copying values into the following registers:

MAC_PPS0_TARGET_TIME_NANOSECONDS
MAC_PPS0_TARGET_TIME_SECONDS

I would like to clarify:

How do I connect mcgr_dma_req_o to the DMA controller? How eDMA will receive Peripheral Request?
Are these signals internally routed to the DMA MUX in the MCU, or do I need to configure any specific routing?

If anyone has any examples, reference configurations, or application notes for this kind of setup, please share.

The intended behavior is:
Whenever the GMAC system time reaches the current target time, the mcgr_dma_req_o signal triggers a DMA transfer that updates the target time for the next PPS event.

Thanks in Advance!!!

topic Media clock generation using eDMA in S32K

Media clock generation using eDMA