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    <title>S32K中的主题 Re: UART TX pullup</title>
    <link>https://community.nxp.com/t5/S32K/UART-TX-pullup/m-p/2133224#M50873</link>
    <description>&lt;P&gt;Hi Kevin,&lt;/P&gt;
&lt;P&gt;yes, the pin pin level is retained during the Standby. If you need low level you will need to change to GPIO here.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;For the MSCR reconfig, this can be done as per user needs. The Apps feedback for this is..."the user can modify the MSCR during the runtime, just taking care of the correct initialization | configuration. The note in the RM is that we cannot recommend doing that because it is not the ideal application, but not for the internal capabilities."&lt;/P&gt;
&lt;P&gt;BR, Petr&lt;/P&gt;</description>
    <pubDate>Mon, 14 Jul 2025 09:17:55 GMT</pubDate>
    <dc:creator>PetrS</dc:creator>
    <dc:date>2025-07-14T09:17:55Z</dc:date>
    <item>
      <title>UART TX pullup</title>
      <link>https://community.nxp.com/t5/S32K/UART-TX-pullup/m-p/2131389#M50756</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I'm using s32k324, we have seen LIN TX pin always pullup, but don't know why.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;So I created a fresh project in s32 ds, and I only configured PTA29 as LPUART TX, after pin initialization, it becomes high.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;To test further, I also tried to configure it as GPIO Output, after the pin configuration, it is not pullup.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please help to clarify the pull up behavior.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Test was performed by multi meter on MCU pin.&lt;/P&gt;</description>
      <pubDate>Thu, 10 Jul 2025 05:15:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/UART-TX-pullup/m-p/2131389#M50756</guid>
      <dc:creator>Panasonic_Kevin_Yang</dc:creator>
      <dc:date>2025-07-10T05:15:20Z</dc:date>
    </item>
    <item>
      <title>Re: UART TX pullup</title>
      <link>https://community.nxp.com/t5/S32K/UART-TX-pullup/m-p/2131546#M50771</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;there can be several reasons for this.&lt;BR /&gt;- you enabled weak pull up on pin&lt;BR /&gt;- pin is connected to LIN transceiver which has typically internal weak pull up on its TXD pin as well&lt;BR /&gt;- you did LPUART init before.&amp;nbsp;The transmitter output (TXD) idle state defaults to logic high.&lt;/P&gt;
&lt;P&gt;For the GPIO output setting, the output level depends on configured init level, driven by respective GPDO register.&lt;/P&gt;
&lt;P&gt;BR, Petr&lt;/P&gt;</description>
      <pubDate>Thu, 10 Jul 2025 08:10:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/UART-TX-pullup/m-p/2131546#M50771</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2025-07-10T08:10:40Z</dc:date>
    </item>
    <item>
      <title>Re: UART TX pullup</title>
      <link>https://community.nxp.com/t5/S32K/UART-TX-pullup/m-p/2132147#M50808</link>
      <description>&lt;P&gt;Hi Petr,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Below is the config and source code for testing purpose.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Pin Config:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Panasonic_Kevin_Yang_0-1752202181169.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/347075i31F21BECDF8EA84E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Panasonic_Kevin_Yang_0-1752202181169.png" alt="Panasonic_Kevin_Yang_0-1752202181169.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;DIV&gt;generated code :&lt;/DIV&gt;&lt;DIV&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Panasonic_Kevin_Yang_2-1752202334579.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/347079i740D4DE1A989A817/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Panasonic_Kevin_Yang_2-1752202334579.png" alt="Panasonic_Kevin_Yang_2-1752202334579.png" /&gt;&lt;/span&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/DIV&gt;&lt;DIV&gt;Main function:&lt;/DIV&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Panasonic_Kevin_Yang_1-1752202292308.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/347077i0B11892C0DBA5B09/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Panasonic_Kevin_Yang_1-1752202292308.png" alt="Panasonic_Kevin_Yang_1-1752202292308.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;As you can see, PIN pullup is not enabled.&lt;/P&gt;&lt;P&gt;before&amp;nbsp;Siul2_Port_Ip_Init() execution, the pin is 0V, it becomes 5V after it.&lt;/P&gt;&lt;P&gt;So, it is not LIN transceiver internal pullup.&lt;/P&gt;&lt;P&gt;NO LPUART driver init has been performed.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;And Today, I also tested on NXP EVM&amp;nbsp;&lt;A href="https://www.nxp.com/design/design-center/development-boards-and-designs/S32K3X4EVB-T172" target="_blank" rel="noopener"&gt;S32K3X4EVB-T172 Evaluation Board for Automotive General Purpose | NXP Semiconductors&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;It has the same behavior.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please help to check if it is NXP design to do so?&amp;nbsp; if so, how can I change its behavior?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 11 Jul 2025 02:57:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/UART-TX-pullup/m-p/2132147#M50808</guid>
      <dc:creator>Panasonic_Kevin_Yang</dc:creator>
      <dc:date>2025-07-11T02:57:30Z</dc:date>
    </item>
    <item>
      <title>Re: UART TX pullup</title>
      <link>https://community.nxp.com/t5/S32K/UART-TX-pullup/m-p/2132483#M50831</link>
      <description>&lt;P&gt;Hi Kevin,&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;this behavior has been confirmed.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;It appears that the internal logic maintains the "TXD" signal at a high level by default. Consequently, when the pin is selected via SIUL, it transitions to a high state.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Could this behavior lead to any issues?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Since a high level represents the idle state in UART/LIN protocols, it is unclear why there is an effort to modify this behavior.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;BR, Petr&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 11 Jul 2025 10:47:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/UART-TX-pullup/m-p/2132483#M50831</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2025-07-11T10:47:10Z</dc:date>
    </item>
    <item>
      <title>Re: UART TX pullup</title>
      <link>https://community.nxp.com/t5/S32K/UART-TX-pullup/m-p/2132530#M50836</link>
      <description>&lt;P&gt;it is still high in standby mode, our concern is power consumption.&lt;/P&gt;&lt;P&gt;what is the best practice to make it low when we standby mode, reconfigure it to gpio?&lt;/P&gt;</description>
      <pubDate>Fri, 11 Jul 2025 12:32:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/UART-TX-pullup/m-p/2132530#M50836</guid>
      <dc:creator>Panasonic_Kevin_Yang</dc:creator>
      <dc:date>2025-07-11T12:32:24Z</dc:date>
    </item>
    <item>
      <title>Re: UART TX pullup</title>
      <link>https://community.nxp.com/t5/S32K/UART-TX-pullup/m-p/2132609#M50844</link>
      <description>&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Panasonic_Kevin_Yang_0-1752250055001.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/347215i5FF5D4AAEA2BDD14/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Panasonic_Kevin_Yang_0-1752250055001.png" alt="Panasonic_Kevin_Yang_0-1752250055001.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;I tried to change pin configuration during runtime, it seems not possible.&lt;/P&gt;&lt;P&gt;And NXP document also mentioned it.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;what could be the solution?&amp;nbsp; &amp;nbsp;a MCU reset is needed to load different pin mux config data?&lt;/P&gt;</description>
      <pubDate>Fri, 11 Jul 2025 16:08:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/UART-TX-pullup/m-p/2132609#M50844</guid>
      <dc:creator>Panasonic_Kevin_Yang</dc:creator>
      <dc:date>2025-07-11T16:08:54Z</dc:date>
    </item>
    <item>
      <title>Re: UART TX pullup</title>
      <link>https://community.nxp.com/t5/S32K/UART-TX-pullup/m-p/2133224#M50873</link>
      <description>&lt;P&gt;Hi Kevin,&lt;/P&gt;
&lt;P&gt;yes, the pin pin level is retained during the Standby. If you need low level you will need to change to GPIO here.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;For the MSCR reconfig, this can be done as per user needs. The Apps feedback for this is..."the user can modify the MSCR during the runtime, just taking care of the correct initialization | configuration. The note in the RM is that we cannot recommend doing that because it is not the ideal application, but not for the internal capabilities."&lt;/P&gt;
&lt;P&gt;BR, Petr&lt;/P&gt;</description>
      <pubDate>Mon, 14 Jul 2025 09:17:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/UART-TX-pullup/m-p/2133224#M50873</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2025-07-14T09:17:55Z</dc:date>
    </item>
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