S32KのトピックRe: S32K358 GMAC: Rx queue to DMA mapping

S32K358 GMAC: Rx queue to DMA mapping

sathishkumar_sunmugavel — Wed, 25 Jun 2025 06:46:42 GMT

Hi Team,

I am currently working on configuring Rx queue to DMA mapping in the GMAC module of the S32K358 and have a few questions regarding the dynamic mapping configuration.

From the documentation, I understand that there are two types of mappings: static and dynamic. I am focusing on dynamic mapping.

In dynamic mapping, Queues [0/1/2] can be enabled for DA-based DMA channel selection. Additionally, the DCS (DMA Channel Select) bit in the MAC_Address1_High register is used to directly map incoming packets—whose Destination Address (DA) matches the configured MAC address—to a specific DMA channel.

My doubt is as follows:

The MAC receives the incoming packet and checks if the DA matches the value configured in MAC_Address1_High. If it matches, the DCS bit is used to select the corresponding DMA channel.
In this scenario, which Rx queue will be used to route the received packet to the selected DMA channel?
How should this be configured properly?

Best Regards,
Sathish.

Re: S32K358 GMAC: Rx queue to DMA mapping

PavelL — Thu, 26 Jun 2025 07:07:26 GMT

Hello @sathishkumar_sunmugavel ,

Thank you for detailed description of your query.
I took a look at the RTD driver and found the following:

The function GMAC_SetRxQueuesDmaChMap() in Gmac_Ip_Hw_Access.c configures the mapping between Rx queues and DMA channels using the MTL_RXQ_DMA_MAP0 and MTL_RXQ_DMA_MAP1 registers.
Each queue can be assigned a default DMA channel (QxDDMACH) and a MAC address matched DMA channel (QxMDMACH), which is used when a packet matches a configured MAC address filter.
The driver supports dynamic channel selection via the DCS bit in the MAC_ADDRESS1_HIGH register, allowing packets with specific destination MAC addresses to be routed to specific DMA channels.
The interrupt handlers in Gmac_Ip_Irq.c and the initialization logic in Gmac_Ip.c confirm that the driver supports multiple DMA channels and queues, and that the mapping is handled explicitly during initialization.

Q1: How does the GMAC decide which Rx queue to use when a packet matches a MAC address filter?
When a packet matches a MAC address filter (e.g., MAC_ADDRESS1_HIGH/LOW), and the DCS (Dynamic Channel Select) bit is set, the GMAC uses the QxMDMACH field from the MTL_RXQ_DMA_MAPx register to determine which DMA channel (and thus which Rx queue) should handle the packet.

This mapping is configured in the RTD driver via the function:

void GMAC_SetRxQueuesDmaChMap(GMAC_Type * Base, uint8 QueuesNum)

This function sets up the mapping between Rx queues and DMA channels using registers like:

MTL_RXQ_DMA_MAP0
MTL_RXQ_DMA_MAP1

For example:

Base->MTL_RXQ_DMA_MAP0 |= GMAC_MTL_RXQ_DMA_MAP0_Q1MDMACH(1U);

This means: if a packet matches the MAC address filter and DCS is enabled, it will be routed to DMA channel 1, which is typically associated with Rx queue 1.

Q2: How to configure the mapping between Rx queues and DMA channels?
The mapping is explicitly configured in the RTD driver using the GMAC_SetRxQueuesDmaChMap() function. Each queue can be assigned:

A default DMA channel (QxDDMACH) – used for general traffic.
A MAC-matched DMA channel (QxMDMACH) – used when a packet matches a MAC address and DCS is set.

This allows flexible routing of traffic based on MAC address filtering.

This is a very specific question related to the internal logic of GMAC and its interaction with DMA. If you require further information, please contact your FAE directly or create a support ticket via the following link:
https://support.nxp.com/s/?language=en_US

Thank you for your understanding.

Best regards,

Pavel

Re: S32K358 GMAC: Rx queue to DMA mapping

sathishkumar_sunmugavel — Thu, 26 Jun 2025 10:54:36 GMT

Hi @PavelL

Thank you so much for your input.

I understand that the QxMDMACH field is used to map a queue to a specific DMA channel. However, this mapping is only valid when the QxDDMACH bit is cleared.

In my case, the QxDDMACH bit is set because I intend to use DA-based DMA Channel Selection. Therefore, I assume the value in QxMDMACH is not considered in this configuration.

Additionally, the DCS field is set in the MAC_Address(x)_High register.

So, does this mean that if I select DMA Channel 0 via the DCS field in the MAC_Address(x)_High register, the packet will be routed internally to Queue 0?
And if I want to route packets to DMA Channel 1, should I also enable Queue 1 for DA-based channel selection by setting the corresponding QxDDMACH bit?

However, the DCS field only specifies the DMA channel, and does not mention which queue the packet will be routed to. So, I’m not sure if my understanding is correct.

Best Regards,
Sathish.

Re: S32K358 GMAC: Rx queue to DMA mapping

PavelL — Fri, 27 Jun 2025 13:39:34 GMT

Hello @sathishkumar_sunmugavel ,

please find my understanding below.

Clarification on QxDDMACH and QxMDMACH behavior

When QxDDMACH = 1, the queue is enabled for DA-based DMA Channel Selection. In this case, the DMA channel is selected based on the DCS field in the MAC_Address(x)_High register (or L3/L4 filters), and QxMDMACH is ignored.
When QxDDMACH = 0, the queue is not using DA-based selection, and the QxMDMACH field is used to determine which DMA channel the queue maps to.

So yes — your understanding is correct: QxMDMACH is only considered when QxDDMACH is cleared.

Regarding your configuration:

You have DCS set in MAC_Address(x)_High, and Q0DDMACH = 1 → this means packets matching that MAC address will be routed to DMA Channel 0, and Queue 0 is eligible to receive them.
If you want to route packets to DMA Channel 1, you must:
- Set DCS = 1 in another MAC_Address(x)_High entry with DMA Channel = 1
- Set Q1DDMACH = 1 to enable Queue 1 for DA-based DMA Channel Selection

Important Note:

The DCS field selects the DMA channel, but not the queue directly. The queue is selected based on which queues have QxDDMACH = 1 and are eligible to receive traffic for that DMA channel.

So, to summarize:

Condition	Queue Used	DMA Channel
QxDDMACH = 1 + DCS = 1	Queue x	From DCS
QxDDMACH = 0	Queue x	From QxMDMACH

Thank you for your understanding.

Best regards,

Pavel