topic Re: [S32K3] LPSPI Master+Slave in S32K

[S32K3] LPSPI Master+Slave

DiaDev — Fri, 30 May 2025 17:20:38 GMT

Platform: S32DS 3.5.14
Hi,

I'm using the S32K344-EVB with LPSPI1 as Master and LPSPI2 as Slave. I'm facing an issue where the RX data is not being received, even though interrupts are enabled for both.

#define BUFFER_SIZE 10U

#define MASTER_EXTERNAL_DEVICE (Lpspi_Ip_DeviceAttributes_SpiExternalDevice_0_Instance_1_BOARD_InitPeripherals)
#define SLAVE_EXTERNAL_DEVICE (Lpspi_Ip_DeviceAttributes_SpiExternalDevice_1_Instance_1_BOARD_InitPeripherals)

static uint8 TxMasterBuffer[BUFFER_SIZE] = {0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA};
static uint8 RxMasterBuffer[BUFFER_SIZE] = {0};

static uint8 TxSlaveBuffer[BUFFER_SIZE] = {0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA};
static uint8 RxSlaveBuffer[BUFFER_SIZE] = {0};

int main(void)
{

/* Initialize system clock, pin muxing, and interrupts */
Clock_Ip_Init(&Clock_Ip_aClockConfig[0]);
Siul2_Port_Ip_Init(NUM_OF_CONFIGURED_PINS0, g_pin_mux_InitConfigArr0);
IntCtrl_Ip_Init(&IntCtrlConfig_0);

/* Initialize LPSPI1 (Master) and LPSPI2 (Slave) */
Lpspi_Ip_Init(&Lpspi_Ip_PhyUnitConfig_SpiPhyUnit_0_Instance_1_BOARD_InitPeripherals); // Master
Lpspi_Ip_Init(&Lpspi_Ip_PhyUnitConfig_SpiPhyUnit_1_Instance_2_BOARD_InitPeripherals); // Slave

/* Set transfer mode to interrupt for both */
Lpspi_Ip_UpdateTransferMode(MASTER_EXTERNAL_DEVICE.Instance, LPSPI_IP_INTERRUPT); // Master
Lpspi_Ip_UpdateTransferMode(SLAVE_EXTERNAL_DEVICE.Instance, LPSPI_IP_INTERRUPT); // Slave

/* Start Slave transfer first */
(void)Lpspi_Ip_AsyncTransmit(
&SLAVE_EXTERNAL_DEVICE,
TxSlaveBuffer,
RxSlaveBuffer,
BUFFER_SIZE,
SpiSlave_Callback);

/* Then start Master transfer */
(void)Lpspi_Ip_AsyncTransmit(
&MASTER_EXTERNAL_DEVICE,
TxMasterBuffer,
RxMasterBuffer,
BUFFER_SIZE,
NULL);

while (1)
{
// Idle loop; transfers are handled via interrupts
}

return 0;
}

Re: [S32K3] LPSPI Master+Slave

VaneB — Fri, 30 May 2025 21:53:40 GMT

Hi @DiaDev

I just have one observation based on the configuration you shared. It looks like the default pin configuration is still in place, meaning SOUT is set as output and SIN as input.

As your goal is to change this behavior, you will need to modify the LPSPI->CFGR1[PINCFG] register. Since you are working with ConfigTools, I would recommend checking out the following thread, it covers how to make this change directly in the tool.

MR-CANHUBK344 SPI Setup

BR, VaneB

Re: [S32K3] LPSPI Master+Slave

DiaDev — Mon, 02 Jun 2025 04:41:33 GMT

I noticed that the SIN and SOUT pin assignments differ between the schematic and the project’s pin configuration. To avoid issues, I went with the pinout as shown in the schematic.

Is the schematic considered the correct reference in this case?

Re: [S32K3] LPSPI Master+Slave

VaneB — Mon, 02 Jun 2025 17:10:59 GMT

Hi @DiaDev

Based on the schematic, here is how I understand the connections:

Signal	Slave (LPSPI1)	Master (LPSPI2)
PCS0	PTA21 (input)	PTB25 (output)
SCK	PTA28 (input)	PTB29 (output)
MOSI	PTA26 (input)	PTB28 (default: input)
MISO	PTA30 (output)	PTB27 (default: output)

As we can see, the pin setup on the master side does not match the default SPI configuration. That is why, as previously mentioned, you will need to modify the LPSPI->CFGR1[PINCFG]register.

You have two options:

1. Update the PINCFG register to change the default direction of PTB28 and PTB27, so PTB28 becomes an output (MOSI) and PTB27 becomes an input (MISO), matching your intended configuration.

2. Swap the signal roles so that PTB28 is used as the master input (MISO) and PTB27 as the master output (MOSI). This way, you can keeo the default configuration and avoid changing the PINCFG register.

Re: [S32K3] LPSPI Master+Slave

DiaDev — Wed, 11 Jun 2025 04:54:43 GMT

I see a variable named "PortPinMscr". Where can I find the number corresponding to LPSPI? Is there any documentation for this?

Also, is it necessary to configure the port (using the Port module) for LPSPI communication? Is port configuration required for the LPSPI master and slave to communicate properly?

Re: [S32K3] LPSPI Master+Slave

VaneB — Wed, 11 Jun 2025 17:26:37 GMT

Hi @DiaDev

The "PortPin MSCR" is a numeric value representing the Multiplexed Signal Configuration Register. It can be calculated using the following formula:

PortPinMscr = PinId + (PortId × 32)

Where:

PortId is the numeric identifier of the port (e.g., PortA = 0, PortB = 1, PortC = 2, etc.).
PinId is the index of the selected pin within the port.

For example, for PTB0, the calculation would be:

PortPinMscr = 0 + (1 × 32) = 32

Additionally, if you place the cursor over the "Routed pin/signal" column in the Pins Tool, this value will be displayed along with other relevant information. Please refer to the image below for a visual reference.

Lastly, yes, it is necessary to add and configure all the used pins in the Port Driver to ensure proper peripheral functionality. This driver is responsible for initializing the entire PORT structure of the microcontroller.