<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Inquiry on Potential ISR Delay When Using Siul2_Dio_Ip_WritePin() in RTD in S32K</title>
    <link>https://community.nxp.com/t5/S32K/Inquiry-on-Potential-ISR-Delay-When-Using-Siul2-Dio-Ip-WritePin/m-p/2107616#M49385</link>
    <description>&lt;P&gt;I am currently working on an S32K3-based system and using the Siul2_Dio_Ip driver from the RTD package for GPIO control.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have observed that the `Siul2_Dio_Ip_WritePin()` function disables interrupts internally by invoking `SchM_Enter/Exit`. While I haven’t encountered any noticeable interrupt delays during actual testing, this behavior raised some questions.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Specifically, I am curious whether disabling interrupts in this context might affect real-time interrupts such as timer ISRs, potentially causing scheduling delays.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Therefore, I would like to ask:&lt;/P&gt;&lt;P&gt;- When `Siul2_Dio_Ip_WritePin()` is called repeatedly, does it introduce any measurable impact on ISR latency or scheduling, particularly for timer-based interrupts?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I would appreciate any clarification or reference data you can provide on this matter.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Best regards,&lt;/P&gt;</description>
    <pubDate>Fri, 30 May 2025 04:28:37 GMT</pubDate>
    <dc:creator>malove</dc:creator>
    <dc:date>2025-05-30T04:28:37Z</dc:date>
    <item>
      <title>Inquiry on Potential ISR Delay When Using Siul2_Dio_Ip_WritePin() in RTD</title>
      <link>https://community.nxp.com/t5/S32K/Inquiry-on-Potential-ISR-Delay-When-Using-Siul2-Dio-Ip-WritePin/m-p/2107616#M49385</link>
      <description>&lt;P&gt;I am currently working on an S32K3-based system and using the Siul2_Dio_Ip driver from the RTD package for GPIO control.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have observed that the `Siul2_Dio_Ip_WritePin()` function disables interrupts internally by invoking `SchM_Enter/Exit`. While I haven’t encountered any noticeable interrupt delays during actual testing, this behavior raised some questions.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Specifically, I am curious whether disabling interrupts in this context might affect real-time interrupts such as timer ISRs, potentially causing scheduling delays.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Therefore, I would like to ask:&lt;/P&gt;&lt;P&gt;- When `Siul2_Dio_Ip_WritePin()` is called repeatedly, does it introduce any measurable impact on ISR latency or scheduling, particularly for timer-based interrupts?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I would appreciate any clarification or reference data you can provide on this matter.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Best regards,&lt;/P&gt;</description>
      <pubDate>Fri, 30 May 2025 04:28:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Inquiry-on-Potential-ISR-Delay-When-Using-Siul2-Dio-Ip-WritePin/m-p/2107616#M49385</guid>
      <dc:creator>malove</dc:creator>
      <dc:date>2025-05-30T04:28:37Z</dc:date>
    </item>
    <item>
      <title>Re: Inquiry on Potential ISR Delay When Using Siul2_Dio_Ip_WritePin() in RTD</title>
      <link>https://community.nxp.com/t5/S32K/Inquiry-on-Potential-ISR-Delay-When-Using-Siul2-Dio-Ip-WritePin/m-p/2108161#M49435</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/241168"&gt;@malove&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;This could be the case if a specific interrupt is invoked while the Siul2_Dio_Ip_WritePin() function is called, but I've made a simple test by calling the Pit ISR while toggling a pin with the RTD function, and without. I could not find any significant difference in between ISRs.&lt;/P&gt;
&lt;P&gt;It is not tested specifically for ISRs, but there was a comment regarding execution time for pin toggling being affected by the scheduler module functions (See the following community post:&amp;nbsp;&lt;A href="https://community.nxp.com/t5/S32K/s32k312-schM-caused-delay/td-p/2022859" target="_blank"&gt;Solved: s32k312 schM caused delay - NXP Community&lt;/A&gt;). You can disable the SchM implementation if you wish to remove this delay.&lt;/P&gt;
&lt;P&gt;However, these functions are provided by&amp;nbsp;&lt;SPAN&gt;NXP as stubs for AUTOSAR SchM integration. If you are targeting AUTOSAROS, these will need to be replaced by the BSW integrator with a third-party vendor (be it Vector, Elektrobit, etc.).&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best regards,&lt;BR /&gt;Julián&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 30 May 2025 17:05:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Inquiry-on-Potential-ISR-Delay-When-Using-Siul2-Dio-Ip-WritePin/m-p/2108161#M49435</guid>
      <dc:creator>Julián_AragónM</dc:creator>
      <dc:date>2025-05-30T17:05:05Z</dc:date>
    </item>
  </channel>
</rss>

