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    <title>S32KのトピックFS85 INTB  pin configuration</title>
    <link>https://community.nxp.com/t5/S32K/FS85-INTB-pin-configuration/m-p/2099620#M48947</link>
    <description>&lt;P&gt;Hello Team,&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am trying to configure with Infineon TC399 . I&amp;nbsp; am facing issue in configuring INTB pin .&amp;nbsp;&lt;/P&gt;&lt;P&gt;Can someone suggest how do we have to configure INTB pin or it will be handled by the device.&lt;/P&gt;</description>
    <pubDate>Mon, 19 May 2025 07:57:20 GMT</pubDate>
    <dc:creator>sakshimashalkar</dc:creator>
    <dc:date>2025-05-19T07:57:20Z</dc:date>
    <item>
      <title>FS85 INTB  pin configuration</title>
      <link>https://community.nxp.com/t5/S32K/FS85-INTB-pin-configuration/m-p/2099620#M48947</link>
      <description>&lt;P&gt;Hello Team,&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am trying to configure with Infineon TC399 . I&amp;nbsp; am facing issue in configuring INTB pin .&amp;nbsp;&lt;/P&gt;&lt;P&gt;Can someone suggest how do we have to configure INTB pin or it will be handled by the device.&lt;/P&gt;</description>
      <pubDate>Mon, 19 May 2025 07:57:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/FS85-INTB-pin-configuration/m-p/2099620#M48947</guid>
      <dc:creator>sakshimashalkar</dc:creator>
      <dc:date>2025-05-19T07:57:20Z</dc:date>
    </item>
    <item>
      <title>Re: FS85 INTB  pin configuration</title>
      <link>https://community.nxp.com/t5/S32K/FS85-INTB-pin-configuration/m-p/2100420#M48979</link>
      <description>&lt;P&gt;Hello Sakshi,&lt;/P&gt;
&lt;P&gt;INTB is an open-drain active-low output with internal pull up (10kΩ) to VDDIO.&amp;nbsp;When there is no fault or event, INTB is high (via this internal pull-up).&amp;nbsp;When FS85 asserts an interrupt, INTB is pulled low.&amp;nbsp;Each interrupt can be masked by setting the corresponding inhibit interrupt bit in M_INT_MASK registers.&lt;/P&gt;
&lt;P&gt;On the MCU side, you should configure the GPIO connected to INTB as an input with interrupt capability on falling edge.&amp;nbsp;In an interrupt handler, you should read M_FLAG registers over SPI to determine the cause and de-assert the interrupt pin.&lt;/P&gt;
&lt;P&gt;BRs, Tomas&lt;/P&gt;</description>
      <pubDate>Tue, 20 May 2025 07:02:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/FS85-INTB-pin-configuration/m-p/2100420#M48979</guid>
      <dc:creator>TomasVaverka</dc:creator>
      <dc:date>2025-05-20T07:02:48Z</dc:date>
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