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    <title>S32KのトピックRe: S32k312 SCST exception hardfault</title>
    <link>https://community.nxp.com/t5/S32K/S32k312-SCST-exception-hardfault/m-p/2076179#M47575</link>
    <description>&lt;P&gt;Hello,&lt;BR /&gt;m7_scst_exception_mem_fault_test intentionally triggers 2 exceptions for testing purposes.&lt;/P&gt;
&lt;P&gt;1. Please go to label&amp;nbsp;&lt;STRONG&gt;m7_scst_exception_mem_fault_test&lt;BR /&gt;&lt;/STRONG&gt;2. Place breakpoint at label&amp;nbsp;&lt;STRONG&gt;m7_scst_ISR_dispatcher&lt;/STRONG&gt;&lt;BR /&gt;3. Run execution till breakpoint. Check exception ids:&lt;BR /&gt;&amp;nbsp;-&amp;nbsp;&lt;SPAN&gt;1st exception should be hardfault (exception id 3)&lt;BR /&gt;&amp;nbsp;-&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;2nd exception should be memManageFault (exception id 4)&lt;BR /&gt;&amp;nbsp; &amp;nbsp;Please check that each exception is serviced by SCST ISR handlers&amp;nbsp;&lt;STRONG&gt;m7_scst_exception_mem_fault_ISR0&lt;/STRONG&gt; or&amp;nbsp;&lt;STRONG&gt;m7_scst_exception_mem_fault_ISR1&lt;/STRONG&gt;.&lt;BR /&gt;4. No further exceptions should occur in this test.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Could You please describe how it behaves at Your side? Is&amp;nbsp;&lt;STRONG&gt;m7_scst_ISR_dispatcher&lt;/STRONG&gt; reached, exceptions triggered and served?&lt;BR /&gt;Thank You!&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best Regards&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Mirek&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Tue, 08 Apr 2025 12:37:52 GMT</pubDate>
    <dc:creator>Mirek_Franek</dc:creator>
    <dc:date>2025-04-08T12:37:52Z</dc:date>
    <item>
      <title>S32k312 SCST exception hardfault</title>
      <link>https://community.nxp.com/t5/S32K/S32k312-SCST-exception-hardfault/m-p/2074276#M47490</link>
      <description>&lt;P&gt;Hello? NXP Team.&lt;/P&gt;&lt;P&gt;I am applying SCST to S32K312 MCU.&lt;/P&gt;&lt;P&gt;The version I am using is the paid version.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I placed rom/ram in the guide document in the linker file, but when i run atomic test,&lt;/P&gt;&lt;P&gt;exception hardfault occurs.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;where should i look? If there is a guide, please expain it.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;below is the content of the t32, stack frame screen.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;////////////////////////////////////////////////////////&lt;/P&gt;&lt;P&gt;Hardfault_Hander()&lt;/P&gt;&lt;P&gt;-&amp;gt;exception&lt;/P&gt;&lt;P&gt;m7_scst_exception_mem_fault_test(asm)&lt;/P&gt;&lt;P&gt;-&amp;gt;exception&lt;/P&gt;&lt;P&gt;C40_Ip_MainInterfaceSectorEraseStatus()&lt;/P&gt;&lt;P&gt;end of frame&lt;/P&gt;&lt;P&gt;///////////////////////////////////////////////////////&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 04 Apr 2025 13:05:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32k312-SCST-exception-hardfault/m-p/2074276#M47490</guid>
      <dc:creator>sungjun</dc:creator>
      <dc:date>2025-04-04T13:05:56Z</dc:date>
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    <item>
      <title>Re: S32k312 SCST exception hardfault</title>
      <link>https://community.nxp.com/t5/S32K/S32k312-SCST-exception-hardfault/m-p/2076179#M47575</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;m7_scst_exception_mem_fault_test intentionally triggers 2 exceptions for testing purposes.&lt;/P&gt;
&lt;P&gt;1. Please go to label&amp;nbsp;&lt;STRONG&gt;m7_scst_exception_mem_fault_test&lt;BR /&gt;&lt;/STRONG&gt;2. Place breakpoint at label&amp;nbsp;&lt;STRONG&gt;m7_scst_ISR_dispatcher&lt;/STRONG&gt;&lt;BR /&gt;3. Run execution till breakpoint. Check exception ids:&lt;BR /&gt;&amp;nbsp;-&amp;nbsp;&lt;SPAN&gt;1st exception should be hardfault (exception id 3)&lt;BR /&gt;&amp;nbsp;-&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;2nd exception should be memManageFault (exception id 4)&lt;BR /&gt;&amp;nbsp; &amp;nbsp;Please check that each exception is serviced by SCST ISR handlers&amp;nbsp;&lt;STRONG&gt;m7_scst_exception_mem_fault_ISR0&lt;/STRONG&gt; or&amp;nbsp;&lt;STRONG&gt;m7_scst_exception_mem_fault_ISR1&lt;/STRONG&gt;.&lt;BR /&gt;4. No further exceptions should occur in this test.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Could You please describe how it behaves at Your side? Is&amp;nbsp;&lt;STRONG&gt;m7_scst_ISR_dispatcher&lt;/STRONG&gt; reached, exceptions triggered and served?&lt;BR /&gt;Thank You!&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Best Regards&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Mirek&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 08 Apr 2025 12:37:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32k312-SCST-exception-hardfault/m-p/2076179#M47575</guid>
      <dc:creator>Mirek_Franek</dc:creator>
      <dc:date>2025-04-08T12:37:52Z</dc:date>
    </item>
    <item>
      <title>Re: S32k312 SCST exception hardfault</title>
      <link>https://community.nxp.com/t5/S32K/S32k312-SCST-exception-hardfault/m-p/2082400#M47879</link>
      <description>&lt;P&gt;Thank you&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;m7_scst_ISR_dispatcher&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;is reached.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;and 1st exception is 3, but instead of jumping to m7_scst_exception_mem_fault_ISR0, it jumps to the existing handler Hardfault_Handler().&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Is there are any possible cause?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 17 Apr 2025 08:38:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32k312-SCST-exception-hardfault/m-p/2082400#M47879</guid>
      <dc:creator>kjy106906</dc:creator>
      <dc:date>2025-04-17T08:38:44Z</dc:date>
    </item>
    <item>
      <title>Re: S32k312 SCST exception hardfault</title>
      <link>https://community.nxp.com/t5/S32K/S32k312-SCST-exception-hardfault/m-p/2085299#M48051</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;thank You for additional information.&lt;BR /&gt;When&amp;nbsp;&lt;STRONG&gt;m7_scst_ISR_dispatcher&lt;/STRONG&gt; is reached, please place breakpoint at label&amp;nbsp;&lt;STRONG&gt;m7_scst_pass_control_to_alien_ISR&lt;/STRONG&gt;, then run execution. Are You able to reach this label?&lt;/P&gt;
&lt;P&gt;If Yes, what are the values stored in R1 and R3 registers?&lt;/P&gt;
&lt;P&gt;If No, please step through ISR_Dispatcher and try to find instruction, after which&amp;nbsp;&lt;SPAN&gt;Hardfault_Handler is reached.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Could You please also provide:&lt;BR /&gt;Which version of SCST are You using?&lt;BR /&gt;What compiler (Vendor / Version) are You using?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Thank You!&lt;BR /&gt;Best Regards&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Mirek&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 23 Apr 2025 08:59:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32k312-SCST-exception-hardfault/m-p/2085299#M48051</guid>
      <dc:creator>Mirek_Franek</dc:creator>
      <dc:date>2025-04-23T08:59:06Z</dc:date>
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