topic Re: Dtcm alignment hardfault in S32K

Dtcm alignment hardfault

ola_gook — Mon, 31 Mar 2025 09:43:17 GMT

Hi,

I am upgrading a project from DS3.4 to DS3.6 and have a problem.

DS3.6 example and system files all use dtcm as stack area, whereas 3.4 used sram. This makes sense and I would prefer to use dtcm also in my project.

However, as my SW uses numerous memcpy with stack as destination and sometimes with unaligned data, I get hardfaults when calling memcpy.

If I understand correctly, the dtcm is aligned differently than sram and that this cannot be changed.

Is there a way around this or do I need to replace all my memcpy calls with an aligned alternative memcpy?

Re: Dtcm alignment hardfault

ola_gook — Mon, 31 Mar 2025 12:59:39 GMT

Managed to pin it down a bit. It turns out that it is not the memcpy that fails but rather setting up the parameters for memcpy, specifically the misaligned destination address. This is unfortunate because it means I cannot replace the memcpy with an alternative.

Making a hardcoded memcpy to the same address works, but not the parameterised destination address. (Breakpoint at the instruction causing the hardfault.)

Regards,

/Ola

Re: Dtcm alignment hardfault

davidtosenovjan — Thu, 03 Apr 2025 07:44:04 GMT

DTCM memory does not have any limitation for read/write accesses in the meaning of data aligment. There is only write access size requirements for ECC initialization that is 64-bit for SRAM and 32-bit for DTCM, but during runtime data accesses may be on any size and alignment.