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    <title>S32KのトピックS32K36  Disabling Core Feasibility</title>
    <link>https://community.nxp.com/t5/S32K/S32K36-Disabling-Core-Feasibility/m-p/2062912#M46859</link>
    <description>&lt;P&gt;As per the internal block diagram of&amp;nbsp;S32K36 , this controller is having&amp;nbsp;One lockstep core pair and One&amp;nbsp;Cortex-M7 core &amp;amp; one more Coolflux DSP. we are looking for feasibility of below&amp;nbsp; options.&lt;/P&gt;&lt;P&gt;1) possibility of&amp;nbsp;Disabling of Coolflux DSP core&amp;nbsp;&lt;/P&gt;&lt;P&gt;2)&amp;nbsp;&amp;nbsp;possibility of&amp;nbsp;Disabling of second Cortex-M7&amp;nbsp; core&lt;/P&gt;&lt;P&gt;3) Converting the&amp;nbsp;second Cortex-M7&amp;nbsp; core in to a lockstep core for the first&amp;nbsp;Cortex-M7&amp;nbsp; core. so that&amp;nbsp;first&amp;nbsp;Cortex-M7&amp;nbsp; core will have two lockstep cores.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In our application we would like to use only&amp;nbsp;One lockstep core pair. So we would like to disable the other cores (second cortex core &amp;amp; Coolflux DSP)&amp;nbsp; for aerospace certification.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nagasahitya_0-1742201317881.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/328398i8865D38CB6CD415E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nagasahitya_0-1742201317881.png" alt="Nagasahitya_0-1742201317881.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 17 Mar 2025 09:02:38 GMT</pubDate>
    <dc:creator>Nagasahitya</dc:creator>
    <dc:date>2025-03-17T09:02:38Z</dc:date>
    <item>
      <title>S32K36  Disabling Core Feasibility</title>
      <link>https://community.nxp.com/t5/S32K/S32K36-Disabling-Core-Feasibility/m-p/2062912#M46859</link>
      <description>&lt;P&gt;As per the internal block diagram of&amp;nbsp;S32K36 , this controller is having&amp;nbsp;One lockstep core pair and One&amp;nbsp;Cortex-M7 core &amp;amp; one more Coolflux DSP. we are looking for feasibility of below&amp;nbsp; options.&lt;/P&gt;&lt;P&gt;1) possibility of&amp;nbsp;Disabling of Coolflux DSP core&amp;nbsp;&lt;/P&gt;&lt;P&gt;2)&amp;nbsp;&amp;nbsp;possibility of&amp;nbsp;Disabling of second Cortex-M7&amp;nbsp; core&lt;/P&gt;&lt;P&gt;3) Converting the&amp;nbsp;second Cortex-M7&amp;nbsp; core in to a lockstep core for the first&amp;nbsp;Cortex-M7&amp;nbsp; core. so that&amp;nbsp;first&amp;nbsp;Cortex-M7&amp;nbsp; core will have two lockstep cores.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;In our application we would like to use only&amp;nbsp;One lockstep core pair. So we would like to disable the other cores (second cortex core &amp;amp; Coolflux DSP)&amp;nbsp; for aerospace certification.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Nagasahitya_0-1742201317881.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/328398i8865D38CB6CD415E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Nagasahitya_0-1742201317881.png" alt="Nagasahitya_0-1742201317881.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 17 Mar 2025 09:02:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K36-Disabling-Core-Feasibility/m-p/2062912#M46859</guid>
      <dc:creator>Nagasahitya</dc:creator>
      <dc:date>2025-03-17T09:02:38Z</dc:date>
    </item>
    <item>
      <title>Re: S32K36  Disabling Core Feasibility</title>
      <link>https://community.nxp.com/t5/S32K/S32K36-Disabling-Core-Feasibility/m-p/2063680#M46904</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/248141"&gt;@Nagasahitya&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;1. Coolflux DSP core is disabled out of reset. If needed, it can be enabled by Mode Entry module.&lt;/P&gt;
&lt;P&gt;2. You can select which core(s) will be enabled out of reset in Boot Configuration Word. Or it is possible to enable or disable specific core by Mode Entry module later in the software.&lt;/P&gt;
&lt;P&gt;3. There's no such option, the device does not support this configuration.&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Tue, 18 Mar 2025 10:08:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K36-Disabling-Core-Feasibility/m-p/2063680#M46904</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2025-03-18T10:08:43Z</dc:date>
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