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<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>topic S32K FLEXIO UART in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907244#M4635</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I use FLEXIO to simulate UART serial port, but I can only achieve the sending function but not the receiving function.&lt;/P&gt;&lt;P&gt;void FLEXIO_UART_port_init (void)&lt;BR /&gt;{&lt;BR /&gt; /*!&lt;BR /&gt; * Pins definitions&lt;BR /&gt; * ===================================================&lt;BR /&gt; *&lt;BR /&gt; * Pin number | Function&lt;BR /&gt; * ----------------- |------------------&lt;BR /&gt; * PTA11 | FXIO_D1 Rx (J6-01)&lt;BR /&gt; * PTA0 | FXIO_D2 Tx (J6-02)&lt;BR /&gt; *&lt;BR /&gt; */&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_PORTA_INDEX]|=PCC_PCCn_CGC_MASK; /* Enable clock for PORTD */&lt;/P&gt;&lt;P&gt;PORTA-&amp;gt;PCR[0] = PORT_PCR_MUX(4); /* Port A0: MUX = FXIO_D2 */&lt;BR /&gt; PORTA-&amp;gt;PCR[11] = PORT_PCR_MUX(4); /* Port A11: MUX = FXIO_D1 */&lt;BR /&gt; PTA-&amp;gt;PDDR |= 1&amp;lt;&amp;lt;0; /* Port A0: Data Direction = output */&lt;BR /&gt; PTA-&amp;gt;PDDR &amp;amp;= ~(1&amp;lt;&amp;lt;11); /* Port A11: Data Direction= input (default) */&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void FLEXIO_UART_init(void)&lt;BR /&gt;{&lt;/P&gt;&lt;P&gt;PCC-&amp;gt;PCCn[PCC_FlexIO_INDEX] &amp;amp;= ~PCC_PCCn_CGC_MASK; /* Disable FLEXIO clock for config. */&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_FlexIO_INDEX] |= PCC_PCCn_PCS(2) /* Select clk option 2 = SIRCDIV2_CLK */&lt;BR /&gt; | PCC_PCCn_CGC_MASK; /* Enable FLEXIO clock */&lt;/P&gt;&lt;P&gt;/*Init Flexio*/&lt;BR /&gt; FLEXIO-&amp;gt;CTRL &amp;amp;= (uint32_t)(~(FLEXIO_CTRL_SWRST_MASK));&lt;BR /&gt; FLEXIO-&amp;gt;CTRL = FLEXIO_CTRL_SWRST(1);&lt;BR /&gt; FLEXIO-&amp;gt;CTRL = 0x0U;&lt;BR /&gt; INT_SYS_EnableIRQ(FLEXIO_IRQn);&lt;BR /&gt; /*enable Flexio*/&lt;BR /&gt; FLEXIO-&amp;gt;CTRL &amp;amp;= (uint32_t)(~(FLEXIO_CTRL_FLEXEN_MASK));&lt;BR /&gt; FLEXIO-&amp;gt;CTRL |= FLEXIO_CTRL_FLEXEN(1);&lt;BR /&gt; &lt;BR /&gt; /*!&lt;BR /&gt; * FlexIO Timer Configuration:&lt;BR /&gt; * =============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;TIMCFG[0] |=&lt;BR /&gt; FLEXIO_TIMCFG_TIMRST(6) /* Timer reset on trigger rising edge */&lt;BR /&gt; |FLEXIO_TIMCFG_TIMOUT(0) /* Output logic 1 when enabled */&lt;BR /&gt; |FLEXIO_TIMCFG_TIMDIS(2) /* Timer disabled on Timer compare */&lt;BR /&gt; |FLEXIO_TIMCFG_TIMENA(2) /* Timer enabled on Trigger high */&lt;BR /&gt; |FLEXIO_TIMCFG_TSTART(1) /* Start bit enabled */&lt;BR /&gt; |FLEXIO_TIMCFG_TSTOP(3); /* Stop bit is enabled on timer compare and timer disable */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Timer Control:&lt;BR /&gt; * ============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;TIMCTL[0] |=&lt;BR /&gt; FLEXIO_TIMCTL_TRGSEL(1) /* Trigger select: Shifter 0 status flag */&lt;BR /&gt; |FLEXIO_TIMCTL_TRGPOL(1) /* Trigger active low */&lt;BR /&gt; |FLEXIO_TIMCTL_TIMOD(1) /* Dual 8-bit counters baud mode */&lt;BR /&gt; |FLEXIO_TIMCTL_TRGSRC(1) /* Internal trigger */&lt;BR /&gt; |FLEXIO_TIMCTL_PINSEL(2) /* Select FXIO_D2 */&lt;BR /&gt; |FLEXIO_TIMCTL_PINCFG(0); /* timer pin output disabled */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Timer Compare Value:&lt;BR /&gt; * =============================&lt;BR /&gt; * In 8-bit baud counter mode, the lower 8-bits configure the baud rate&lt;BR /&gt; * divider equal to (CMP[7:0] + 1) * 2. The upper 8-bits configure the&lt;BR /&gt; * number of bits in each word equal to (CMP[15:8] + 1) / 2.&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;TIMCMP[0] = 0x0FCF; /* 8 bits Transfer */&lt;BR /&gt; /* Baud Rate = 9600/s */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Shifter Configuration:&lt;BR /&gt; * ===============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;SHIFTCFG[0] |=&lt;BR /&gt; FLEXIO_SHIFTCFG_SSTART(2) /* Start bit '0' */&lt;BR /&gt; |FLEXIO_SHIFTCFG_SSTOP(3); /* Stop bit '1' */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Shifter Control:&lt;BR /&gt; * =============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;SHIFTCTL[0] |=&lt;BR /&gt; FLEXIO_SHIFTCTL_TIMSEL(0) /* Select Timer 0 */&lt;BR /&gt; |FLEXIO_SHIFTCTL_PINSEL(2) /* Select FXIO_D2 */&lt;BR /&gt; |FLEXIO_SHIFTCTL_PINCFG(3) /* Shifter pin as Output */&lt;BR /&gt; |FLEXIO_SHIFTCTL_SMOD(2); /* Transmit mode */&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; /* setup FLEX_D1 to receive */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Timer Configuration:&lt;BR /&gt; * =============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;TIMCFG[1] |=&lt;BR /&gt; FLEXIO_TIMCFG_TIMOUT(2) /* Timer output is logic one when enabled and is not affected by timer reset */&lt;BR /&gt; /* FLEXIO_TIMER_INITOUT_ONE_RESET = 0x02U */&lt;BR /&gt; /* Tx/Rx */&lt;BR /&gt; |FLEXIO_TIMCFG_TIMDEC(0) /* Decrement counter on FlexIO clock, Shift clock equals Timer output. */&lt;BR /&gt; /*FLEXIO_TIMER_DECREMENT_CLK_SHIFT_TMR = 0x00U */&lt;BR /&gt; |FLEXIO_TIMCFG_TIMRST(2) /* Timer never reset */&lt;BR /&gt; /* FLEXIO_TIMER_INITOUT_ONE_RESET = 0x02U */&lt;BR /&gt; |FLEXIO_TIMCFG_TIMDIS(2) /* 2 - Timer disabled on Timer compare (upper 8-bits match and decrement) */&lt;BR /&gt; /* 3 - Timer disabled on Timer compare (upper 8-bits match and decrement) and Trigger Low */&lt;BR /&gt; /* FLEXIO_TIMER_DISABLE_TIM_CMP = 0x02U, */&lt;BR /&gt; |FLEXIO_TIMCFG_TIMENA(4) /* Timer enabled on Pin rising edge */&lt;BR /&gt; /* FLEXIO_TIMER_ENABLE_PIN_POSEDGE = 0x04U */&lt;BR /&gt; |FLEXIO_TIMCFG_TSTOP(2) /* Stop bit is enabled on timer disable;FLEXIO_TIMER_STOP_BIT_TIM_DIS = 0x02U */&lt;BR /&gt; |FLEXIO_TIMCFG_TSTART(1); /* Start bit enabled; FLEXIO_TIMER_START_BIT_ENABLED = 0x01U */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Timer Control:&lt;BR /&gt; * ============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;TIMCTL[1] |=&lt;BR /&gt; FLEXIO_TIMCTL_TIMOD(0) /* Dual 8-bit counters baud mode */&lt;BR /&gt; /* Tx/Rx */&lt;BR /&gt; |FLEXIO_TIMCTL_TRGSEL(0) /* External trigger D0 input FLEXIO_TRIGGER_SOURCE_EXTERNAL = 0x00U*/&lt;BR /&gt; |FLEXIO_TIMCTL_TRGPOL(0) /* Trigger active high FLEXIO_TRIGGER_POLARITY_HIGH = 0x00U,*/&lt;BR /&gt; |FLEXIO_TIMCTL_TRGSRC(0) /* External trigger FLEXIO_TRIGGER_SOURCE_EXTERNAL = 0x00U*/&lt;BR /&gt; |FLEXIO_TIMCTL_PINSEL(1) /* 1: Select FXIO_D1, 0: Select FXIO_D0 */&lt;BR /&gt; |FLEXIO_TIMCTL_PINCFG(0) /* timer pin output disabled */&lt;BR /&gt; |FLEXIO_TIMCTL_PINPOL(1);&lt;BR /&gt; /*!&lt;BR /&gt; * FlexIO Timer Compare Value:&lt;BR /&gt; * =============================&lt;BR /&gt; * In 8-bit baud counter mode, the lower 8-bits configure the baud rate&lt;BR /&gt; * divider equal to (CMP[7:0] + 1) * 2. The upper 8-bits configure the&lt;BR /&gt; * number of bits in each word equal to (CMP[15:8] + 1) / 2.&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;TIMCMP[1] = 0x0FCF; /* 8 bits Transfer */&lt;BR /&gt; /* Baud Rate = 19200b/s */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Shifter Configuration:&lt;BR /&gt; * ===============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;SHIFTCFG[1] |=&lt;BR /&gt; FLEXIO_SHIFTCFG_INSRC(0) /* Input source is selected pin */&lt;BR /&gt; |FLEXIO_SHIFTCFG_SSTART(2) /* Start bit '0';FLEXIO_SHIFTER_START_BIT_0 = 0x02U*/&lt;BR /&gt; |FLEXIO_SHIFTCFG_SSTOP(3); /* Stop bit '1'; FLEXIO_SHIFTER_STOP_BIT_1 = 0x03U */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Shifter Control:&lt;BR /&gt; * =============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;SHIFTCTL[1] |=&lt;BR /&gt; FLEXIO_SHIFTCTL_TIMSEL(1) /* Select Timer 1 */&lt;BR /&gt; |FLEXIO_SHIFTCTL_PINSEL(1) /* Select FXIO_D1*/&lt;BR /&gt; /* Tx/Rx */&lt;BR /&gt; |FLEXIO_SHIFTCTL_TIMPOL(1) /* Shift on negedge of Shift clock; FLEXIO_TIMER_POLARITY_NEGEDGE = 0x01U */&lt;BR /&gt; |FLEXIO_SHIFTCTL_PINCFG(0) /* Shifter pin output disabled; FLEXIO_PIN_CONFIG_DISABLED = 0x00U */&lt;BR /&gt; |FLEXIO_SHIFTCTL_PINPOL(0) /* Pin is active high ; FLEXIO_PIN_POLARITY_HIGH = 0x00U*/&lt;BR /&gt; |FLEXIO_SHIFTCTL_SMOD(1); /* Receive mode; FLEXIO_SHIFTER_MODE_RECEIVE = 0x01U */&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;This is the sending function.&lt;/P&gt;&lt;P&gt;void FLEXIO_UART_transmit_char(char send)&lt;BR /&gt;{&lt;BR /&gt; /*!&lt;BR /&gt; * Transmit a single char:&lt;BR /&gt; * =======================&lt;BR /&gt; */&lt;BR /&gt; while(! (FLEXIO-&amp;gt;SHIFTSTAT &amp;amp; 0x1) ); /* Wait for buffer empty */&lt;BR /&gt; FLEXIO-&amp;gt;SHIFTBUF[0] = send; /* Send data to PTA0(Tx line) */&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;static int rx_char = 0;&lt;BR /&gt; static int rx_loop_cnt = 0;&lt;BR /&gt; char FLEXIO_UART_receive_char(void)&lt;BR /&gt; {&lt;BR /&gt; char byte;&lt;BR /&gt; /*!&lt;BR /&gt; * Receive a single char:&lt;BR /&gt; * =======================&lt;BR /&gt; */&lt;BR /&gt; while( !(FLEXIO-&amp;gt;SHIFTSTAT&amp;amp;(1&amp;lt;&amp;lt;(1)&amp;lt;&amp;lt;FLEXIO_SHIFTSTAT_SSF_SHIFT))){};&lt;BR /&gt; byte = FLEXIO-&amp;gt;SHIFTBUFBYS[1];&lt;BR /&gt; if ((byte == 'g') ||(byte == 'G'))&lt;BR /&gt; {&lt;BR /&gt; rx_char++;&lt;BR /&gt; }&lt;BR /&gt; return byte;&lt;BR /&gt; }&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 24 Apr 2019 05:17:30 GMT</pubDate>
    <dc:creator>liulei1</dc:creator>
    <dc:date>2019-04-24T05:17:30Z</dc:date>
    <item>
      <title>S32K FLEXIO UART</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907244#M4635</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I use FLEXIO to simulate UART serial port, but I can only achieve the sending function but not the receiving function.&lt;/P&gt;&lt;P&gt;void FLEXIO_UART_port_init (void)&lt;BR /&gt;{&lt;BR /&gt; /*!&lt;BR /&gt; * Pins definitions&lt;BR /&gt; * ===================================================&lt;BR /&gt; *&lt;BR /&gt; * Pin number | Function&lt;BR /&gt; * ----------------- |------------------&lt;BR /&gt; * PTA11 | FXIO_D1 Rx (J6-01)&lt;BR /&gt; * PTA0 | FXIO_D2 Tx (J6-02)&lt;BR /&gt; *&lt;BR /&gt; */&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_PORTA_INDEX]|=PCC_PCCn_CGC_MASK; /* Enable clock for PORTD */&lt;/P&gt;&lt;P&gt;PORTA-&amp;gt;PCR[0] = PORT_PCR_MUX(4); /* Port A0: MUX = FXIO_D2 */&lt;BR /&gt; PORTA-&amp;gt;PCR[11] = PORT_PCR_MUX(4); /* Port A11: MUX = FXIO_D1 */&lt;BR /&gt; PTA-&amp;gt;PDDR |= 1&amp;lt;&amp;lt;0; /* Port A0: Data Direction = output */&lt;BR /&gt; PTA-&amp;gt;PDDR &amp;amp;= ~(1&amp;lt;&amp;lt;11); /* Port A11: Data Direction= input (default) */&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void FLEXIO_UART_init(void)&lt;BR /&gt;{&lt;/P&gt;&lt;P&gt;PCC-&amp;gt;PCCn[PCC_FlexIO_INDEX] &amp;amp;= ~PCC_PCCn_CGC_MASK; /* Disable FLEXIO clock for config. */&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_FlexIO_INDEX] |= PCC_PCCn_PCS(2) /* Select clk option 2 = SIRCDIV2_CLK */&lt;BR /&gt; | PCC_PCCn_CGC_MASK; /* Enable FLEXIO clock */&lt;/P&gt;&lt;P&gt;/*Init Flexio*/&lt;BR /&gt; FLEXIO-&amp;gt;CTRL &amp;amp;= (uint32_t)(~(FLEXIO_CTRL_SWRST_MASK));&lt;BR /&gt; FLEXIO-&amp;gt;CTRL = FLEXIO_CTRL_SWRST(1);&lt;BR /&gt; FLEXIO-&amp;gt;CTRL = 0x0U;&lt;BR /&gt; INT_SYS_EnableIRQ(FLEXIO_IRQn);&lt;BR /&gt; /*enable Flexio*/&lt;BR /&gt; FLEXIO-&amp;gt;CTRL &amp;amp;= (uint32_t)(~(FLEXIO_CTRL_FLEXEN_MASK));&lt;BR /&gt; FLEXIO-&amp;gt;CTRL |= FLEXIO_CTRL_FLEXEN(1);&lt;BR /&gt; &lt;BR /&gt; /*!&lt;BR /&gt; * FlexIO Timer Configuration:&lt;BR /&gt; * =============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;TIMCFG[0] |=&lt;BR /&gt; FLEXIO_TIMCFG_TIMRST(6) /* Timer reset on trigger rising edge */&lt;BR /&gt; |FLEXIO_TIMCFG_TIMOUT(0) /* Output logic 1 when enabled */&lt;BR /&gt; |FLEXIO_TIMCFG_TIMDIS(2) /* Timer disabled on Timer compare */&lt;BR /&gt; |FLEXIO_TIMCFG_TIMENA(2) /* Timer enabled on Trigger high */&lt;BR /&gt; |FLEXIO_TIMCFG_TSTART(1) /* Start bit enabled */&lt;BR /&gt; |FLEXIO_TIMCFG_TSTOP(3); /* Stop bit is enabled on timer compare and timer disable */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Timer Control:&lt;BR /&gt; * ============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;TIMCTL[0] |=&lt;BR /&gt; FLEXIO_TIMCTL_TRGSEL(1) /* Trigger select: Shifter 0 status flag */&lt;BR /&gt; |FLEXIO_TIMCTL_TRGPOL(1) /* Trigger active low */&lt;BR /&gt; |FLEXIO_TIMCTL_TIMOD(1) /* Dual 8-bit counters baud mode */&lt;BR /&gt; |FLEXIO_TIMCTL_TRGSRC(1) /* Internal trigger */&lt;BR /&gt; |FLEXIO_TIMCTL_PINSEL(2) /* Select FXIO_D2 */&lt;BR /&gt; |FLEXIO_TIMCTL_PINCFG(0); /* timer pin output disabled */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Timer Compare Value:&lt;BR /&gt; * =============================&lt;BR /&gt; * In 8-bit baud counter mode, the lower 8-bits configure the baud rate&lt;BR /&gt; * divider equal to (CMP[7:0] + 1) * 2. The upper 8-bits configure the&lt;BR /&gt; * number of bits in each word equal to (CMP[15:8] + 1) / 2.&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;TIMCMP[0] = 0x0FCF; /* 8 bits Transfer */&lt;BR /&gt; /* Baud Rate = 9600/s */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Shifter Configuration:&lt;BR /&gt; * ===============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;SHIFTCFG[0] |=&lt;BR /&gt; FLEXIO_SHIFTCFG_SSTART(2) /* Start bit '0' */&lt;BR /&gt; |FLEXIO_SHIFTCFG_SSTOP(3); /* Stop bit '1' */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Shifter Control:&lt;BR /&gt; * =============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;SHIFTCTL[0] |=&lt;BR /&gt; FLEXIO_SHIFTCTL_TIMSEL(0) /* Select Timer 0 */&lt;BR /&gt; |FLEXIO_SHIFTCTL_PINSEL(2) /* Select FXIO_D2 */&lt;BR /&gt; |FLEXIO_SHIFTCTL_PINCFG(3) /* Shifter pin as Output */&lt;BR /&gt; |FLEXIO_SHIFTCTL_SMOD(2); /* Transmit mode */&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; /* setup FLEX_D1 to receive */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Timer Configuration:&lt;BR /&gt; * =============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;TIMCFG[1] |=&lt;BR /&gt; FLEXIO_TIMCFG_TIMOUT(2) /* Timer output is logic one when enabled and is not affected by timer reset */&lt;BR /&gt; /* FLEXIO_TIMER_INITOUT_ONE_RESET = 0x02U */&lt;BR /&gt; /* Tx/Rx */&lt;BR /&gt; |FLEXIO_TIMCFG_TIMDEC(0) /* Decrement counter on FlexIO clock, Shift clock equals Timer output. */&lt;BR /&gt; /*FLEXIO_TIMER_DECREMENT_CLK_SHIFT_TMR = 0x00U */&lt;BR /&gt; |FLEXIO_TIMCFG_TIMRST(2) /* Timer never reset */&lt;BR /&gt; /* FLEXIO_TIMER_INITOUT_ONE_RESET = 0x02U */&lt;BR /&gt; |FLEXIO_TIMCFG_TIMDIS(2) /* 2 - Timer disabled on Timer compare (upper 8-bits match and decrement) */&lt;BR /&gt; /* 3 - Timer disabled on Timer compare (upper 8-bits match and decrement) and Trigger Low */&lt;BR /&gt; /* FLEXIO_TIMER_DISABLE_TIM_CMP = 0x02U, */&lt;BR /&gt; |FLEXIO_TIMCFG_TIMENA(4) /* Timer enabled on Pin rising edge */&lt;BR /&gt; /* FLEXIO_TIMER_ENABLE_PIN_POSEDGE = 0x04U */&lt;BR /&gt; |FLEXIO_TIMCFG_TSTOP(2) /* Stop bit is enabled on timer disable;FLEXIO_TIMER_STOP_BIT_TIM_DIS = 0x02U */&lt;BR /&gt; |FLEXIO_TIMCFG_TSTART(1); /* Start bit enabled; FLEXIO_TIMER_START_BIT_ENABLED = 0x01U */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Timer Control:&lt;BR /&gt; * ============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;TIMCTL[1] |=&lt;BR /&gt; FLEXIO_TIMCTL_TIMOD(0) /* Dual 8-bit counters baud mode */&lt;BR /&gt; /* Tx/Rx */&lt;BR /&gt; |FLEXIO_TIMCTL_TRGSEL(0) /* External trigger D0 input FLEXIO_TRIGGER_SOURCE_EXTERNAL = 0x00U*/&lt;BR /&gt; |FLEXIO_TIMCTL_TRGPOL(0) /* Trigger active high FLEXIO_TRIGGER_POLARITY_HIGH = 0x00U,*/&lt;BR /&gt; |FLEXIO_TIMCTL_TRGSRC(0) /* External trigger FLEXIO_TRIGGER_SOURCE_EXTERNAL = 0x00U*/&lt;BR /&gt; |FLEXIO_TIMCTL_PINSEL(1) /* 1: Select FXIO_D1, 0: Select FXIO_D0 */&lt;BR /&gt; |FLEXIO_TIMCTL_PINCFG(0) /* timer pin output disabled */&lt;BR /&gt; |FLEXIO_TIMCTL_PINPOL(1);&lt;BR /&gt; /*!&lt;BR /&gt; * FlexIO Timer Compare Value:&lt;BR /&gt; * =============================&lt;BR /&gt; * In 8-bit baud counter mode, the lower 8-bits configure the baud rate&lt;BR /&gt; * divider equal to (CMP[7:0] + 1) * 2. The upper 8-bits configure the&lt;BR /&gt; * number of bits in each word equal to (CMP[15:8] + 1) / 2.&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;TIMCMP[1] = 0x0FCF; /* 8 bits Transfer */&lt;BR /&gt; /* Baud Rate = 19200b/s */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Shifter Configuration:&lt;BR /&gt; * ===============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;SHIFTCFG[1] |=&lt;BR /&gt; FLEXIO_SHIFTCFG_INSRC(0) /* Input source is selected pin */&lt;BR /&gt; |FLEXIO_SHIFTCFG_SSTART(2) /* Start bit '0';FLEXIO_SHIFTER_START_BIT_0 = 0x02U*/&lt;BR /&gt; |FLEXIO_SHIFTCFG_SSTOP(3); /* Stop bit '1'; FLEXIO_SHIFTER_STOP_BIT_1 = 0x03U */&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt; * FlexIO Shifter Control:&lt;BR /&gt; * =============================&lt;BR /&gt; */&lt;BR /&gt; FLEXIO-&amp;gt;SHIFTCTL[1] |=&lt;BR /&gt; FLEXIO_SHIFTCTL_TIMSEL(1) /* Select Timer 1 */&lt;BR /&gt; |FLEXIO_SHIFTCTL_PINSEL(1) /* Select FXIO_D1*/&lt;BR /&gt; /* Tx/Rx */&lt;BR /&gt; |FLEXIO_SHIFTCTL_TIMPOL(1) /* Shift on negedge of Shift clock; FLEXIO_TIMER_POLARITY_NEGEDGE = 0x01U */&lt;BR /&gt; |FLEXIO_SHIFTCTL_PINCFG(0) /* Shifter pin output disabled; FLEXIO_PIN_CONFIG_DISABLED = 0x00U */&lt;BR /&gt; |FLEXIO_SHIFTCTL_PINPOL(0) /* Pin is active high ; FLEXIO_PIN_POLARITY_HIGH = 0x00U*/&lt;BR /&gt; |FLEXIO_SHIFTCTL_SMOD(1); /* Receive mode; FLEXIO_SHIFTER_MODE_RECEIVE = 0x01U */&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;This is the sending function.&lt;/P&gt;&lt;P&gt;void FLEXIO_UART_transmit_char(char send)&lt;BR /&gt;{&lt;BR /&gt; /*!&lt;BR /&gt; * Transmit a single char:&lt;BR /&gt; * =======================&lt;BR /&gt; */&lt;BR /&gt; while(! (FLEXIO-&amp;gt;SHIFTSTAT &amp;amp; 0x1) ); /* Wait for buffer empty */&lt;BR /&gt; FLEXIO-&amp;gt;SHIFTBUF[0] = send; /* Send data to PTA0(Tx line) */&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;static int rx_char = 0;&lt;BR /&gt; static int rx_loop_cnt = 0;&lt;BR /&gt; char FLEXIO_UART_receive_char(void)&lt;BR /&gt; {&lt;BR /&gt; char byte;&lt;BR /&gt; /*!&lt;BR /&gt; * Receive a single char:&lt;BR /&gt; * =======================&lt;BR /&gt; */&lt;BR /&gt; while( !(FLEXIO-&amp;gt;SHIFTSTAT&amp;amp;(1&amp;lt;&amp;lt;(1)&amp;lt;&amp;lt;FLEXIO_SHIFTSTAT_SSF_SHIFT))){};&lt;BR /&gt; byte = FLEXIO-&amp;gt;SHIFTBUFBYS[1];&lt;BR /&gt; if ((byte == 'g') ||(byte == 'G'))&lt;BR /&gt; {&lt;BR /&gt; rx_char++;&lt;BR /&gt; }&lt;BR /&gt; return byte;&lt;BR /&gt; }&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 24 Apr 2019 05:17:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907244#M4635</guid>
      <dc:creator>liulei1</dc:creator>
      <dc:date>2019-04-24T05:17:30Z</dc:date>
    </item>
    <item>
      <title>Re: S32K FLEXIO UART</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907245#M4636</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have checked your settings and in the receiver settings "TIMOD" bit you have set 0 which means Timer Disabled.&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;FLEXIO-&amp;gt;TIMCTL[1] |=&lt;/SPAN&gt;&lt;BR style="color: #51626f; background-color: #ffffff;" /&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;FLEXIO_TIMCTL_TIMOD(&lt;STRONG style="color: #ff0000; "&gt;0&lt;/STRONG&gt;) /* &lt;SPAN style="color: #ff0000; "&gt;Timer Disabled&lt;/SPAN&gt; */&lt;/SPAN&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;It should be:&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;SPAN&gt;FLEXIO_TIMCTL_TIMOD(1) /* Dual 8-bit counters baud mode */&lt;/SPAN&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also, two notes:&lt;/P&gt;&lt;P&gt;- I would like to recommend you to enable the FlexIO after configuration shifters and timers.&lt;/P&gt;&lt;P&gt;- The PDDR settings are related to GPIO function. It does not need to configure PDDR register when the pins are set as FlexIO.&lt;/P&gt;&lt;P&gt;I hope it helps.&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Diana&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Apr 2019 08:56:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907245#M4636</guid>
      <dc:creator>dianabatrlova</dc:creator>
      <dc:date>2019-04-25T08:56:10Z</dc:date>
    </item>
    <item>
      <title>Re: S32K FLEXIO UART</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907246#M4637</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Hello, I modified the code, now send and receive can be successful. When I receive a byte, there is no problem. When I receive a string of data, there will be FLEXIO - &amp;gt; SHIFTERR = 0x02. This is the time when only the first byte is correct and the next byte is wrong. Here is my receiver function.&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;void FLEXIO_IRQHandler (void)&lt;BR /&gt;{&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;char byte;&lt;BR /&gt;if(FLEXIO-&amp;gt;SHIFTSTAT==0x03)&lt;BR /&gt;{&lt;BR /&gt;byte = (FLEXIO-&amp;gt;SHIFTBUF[1] &amp;gt;&amp;gt; 24 ) &amp;amp; 0xFF;&lt;BR /&gt;}&lt;BR /&gt;if(FLEXIO-&amp;gt;SHIFTERR==0x02)&lt;BR /&gt;{&lt;BR /&gt;FLEXIO-&amp;gt;SHIFTERR=0x02;&lt;BR /&gt;FLEXIO-&amp;gt;TIMSTAT=0x02;&lt;BR /&gt;}&lt;BR /&gt;}&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 26 Apr 2019 08:56:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907246#M4637</guid>
      <dc:creator>liulei1</dc:creator>
      <dc:date>2019-04-26T08:56:15Z</dc:date>
    </item>
    <item>
      <title>Re: S32K FLEXIO UART</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907247#M4638</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I modified the code. Now there is no problem in communication between 1900b/s and 9600b/s. The data I received at 115200 is wrong. What is the reason?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 28 Apr 2019 05:49:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907247#M4638</guid>
      <dc:creator>liulei1</dc:creator>
      <dc:date>2019-04-28T05:49:18Z</dc:date>
    </item>
    <item>
      <title>Re: S32K FLEXIO UART</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907248#M4639</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;One of the reason can be overrun error which can occur with a higher baud rate.&lt;/P&gt;&lt;P&gt;The solution for you can be the select higher frequency of&amp;nbsp;clock option for the FlexIO.&lt;/P&gt;&lt;P&gt;Now&amp;nbsp;you are using SIRCDIV2_CLK which is too slow. So, for example, you can try to&amp;nbsp;use Fast IRC clock (FIRC_CLK) and select as clock option&amp;nbsp;FIRCDIV2_CLK.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope it helps.&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Diana&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 29 Apr 2019 07:21:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907248#M4639</guid>
      <dc:creator>dianabatrlova</dc:creator>
      <dc:date>2019-04-29T07:21:36Z</dc:date>
    </item>
    <item>
      <title>Re: S32K FLEXIO UART</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907249#M4640</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yes, I modified the clock source to work well, but I changed the clock SIRCDIV2_CLK from 8 Mhz to 4 Mhz, and the data received and received were normal. Why can the frequency be used instead of decreasing?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 29 Apr 2019 09:32:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907249#M4640</guid>
      <dc:creator>liulei1</dc:creator>
      <dc:date>2019-04-29T09:32:08Z</dc:date>
    </item>
    <item>
      <title>Re: S32K FLEXIO UART</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907250#M4641</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Lei,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can decrease the baud rate or increase the clock source frequency for the FlexIO module.&lt;/P&gt;&lt;P&gt;I'm not sure if you decreased the&amp;nbsp;SIRCDIV2_CLK from 8 MHz to 4 MHz&amp;nbsp;if the data are received correctly with 115200 baud rate.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also, the increase&amp;nbsp;the interrupt priority can be useful.&lt;/P&gt;&lt;P&gt;I hope it helps.&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Diana&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 29 Apr 2019 12:54:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907250#M4641</guid>
      <dc:creator>dianabatrlova</dc:creator>
      <dc:date>2019-04-29T12:54:56Z</dc:date>
    </item>
    <item>
      <title>Re: S32K FLEXIO UART</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907251#M4642</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Diana,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;I tried the routine in S32DS (flexio_uart_s32k144). When setting the clock source at 8Mhz, 115200 could be communicated, but 9600 was out of order. When I changed to 4Mhz, it was normal. Compared with my own code, it's just the opposite. When I set it to 8Mhz, 115200 was scrambled and 9600 was normal. It's normal at 4Mhz.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="border: 0px; font-size: 14px;"&gt;Best Regards,&lt;/P&gt;&lt;P style="border: 0px; font-size: 14px;"&gt;lei liu&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Apr 2019 02:46:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907251#M4642</guid>
      <dc:creator>liulei1</dc:creator>
      <dc:date>2019-04-30T02:46:43Z</dc:date>
    </item>
    <item>
      <title>Re: S32K FLEXIO UART</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907252#M4643</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Lei,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to check your clock settings, can you, please, share it?&lt;/P&gt;&lt;P&gt;Also, what can you see on the bus?&amp;nbsp;&lt;/P&gt;&lt;P&gt;Can you measure SIRCDIV2_CLK&amp;nbsp; 4 MHz&lt;SPAN style="background-color: #ffffff; color: #51626f; "&gt;?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Diana&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 May 2019 06:53:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907252#M4643</guid>
      <dc:creator>dianabatrlova</dc:creator>
      <dc:date>2019-05-02T06:53:53Z</dc:date>
    </item>
    <item>
      <title>Re: S32K FLEXIO UART</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907253#M4644</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Hello&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Diana,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Here's my clock settings。&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;void SIRC_init_8MHz(void)&lt;BR /&gt;{&lt;BR /&gt; SCG-&amp;gt;SIRCCSR = 0U; /* Init SIRC */&lt;BR /&gt; SCG-&amp;gt;SIRCDIV = (SCG_SIRCDIV_SIRCDIV1(1U) | SCG_SIRCDIV_SIRCDIV2(2U)); /* Setup SIRCDIV1_CLK SIRCDIV2_CLK. */&lt;BR /&gt; SCG-&amp;gt;SIRCCFG = SCG_SIRCCFG_RANGE(1U); /* Set SIRC high range(8 MHz ) */&lt;BR /&gt; SCG-&amp;gt;SIRCCSR = SCG_SIRCCSR_SIRCEN(1U); /* Enable clock. */&lt;/P&gt;&lt;P&gt;while (!(SCG-&amp;gt;SIRCCSR &amp;amp; SCG_SIRCCSR_SIRCVLD(1U))) __NOP(); /* Wait for SIRC clock to be valid. */ &lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;PCC-&amp;gt;PCCn[PCC_FlexIO_INDEX] &amp;amp;= ~PCC_PCCn_CGC_MASK; /* Disable FLEXIO clock for config. */&lt;BR /&gt; PCC-&amp;gt;PCCn[PCC_FlexIO_INDEX] |= PCC_PCCn_PCS(2) /* Select clk option 2 = SIRCDIV2_CLK */&lt;BR /&gt; | PCC_PCCn_CGC_MASK; /* Enable FLEXIO clock */&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 05 May 2019 05:14:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907253#M4644</guid>
      <dc:creator>liulei1</dc:creator>
      <dc:date>2019-05-05T05:14:58Z</dc:date>
    </item>
    <item>
      <title>Re: S32K FLEXIO UART</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907254#M4645</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Lei,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Your clock settings are correct.&lt;/P&gt;&lt;P&gt;However,&amp;nbsp;the reason for the wrong received data&amp;nbsp;can be because of the wrong baud rate&amp;nbsp;settings in TIMCMP register (there can be an error between the actual baudrate and required baudrate).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can refer to RM rev 9. to the section "52.3.1.21 Timer Compare N Register (TIMCMP0 - TIMCMP3)"&lt;/P&gt;&lt;P&gt;For example:&lt;/P&gt;&lt;P&gt;"In 8-bit baud counter mode, the lower 8-bits configure the baud rate divider equal to (CMP[7:0] + 1) * 2.&lt;BR /&gt;The upper 8-bits configure the number of bits in each word equal to (CMP[15:8] + 1) / 2."&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope it helps.&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Diana&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 10 May 2019 09:02:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907254#M4645</guid>
      <dc:creator>dianabatrlova</dc:creator>
      <dc:date>2019-05-10T09:02:54Z</dc:date>
    </item>
    <item>
      <title>Re: S32K FLEXIO UART</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907255#M4646</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, I found the problem.&lt;/P&gt;&lt;P&gt;The TIMCMP register is configured in the S32DS as follows:&lt;/P&gt;&lt;P&gt;Static void FLEXIO_UART_DRV_ComputeBaudRateDivider (uint32_t baudRate, Uint16_t*divider, Uint32_t inputClock)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;Int32_t tmpDiv;&lt;/P&gt;&lt;P&gt;/* Compute divider: ((input_clock/baud_rate)/ 2) - 1. Round to nearest integer*/&lt;/P&gt;&lt;P&gt;TmpDiv = ((int32_t) inputClock + (int32_t) baudRate) / (2* (int32_t) baudRate) - 1;&lt;/P&gt;&lt;P&gt;/* Enforce upper/lower limits*/&lt;/P&gt;&lt;P&gt;If (tmpDiv &amp;lt; DIVIDER_MIN_VALUE)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;TmpDiv = DIVIDER_MIN_VALUE;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;If (tmpDiv &amp;gt; DIVIDER_MAX_VALUE)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;TmpDiv = DIVIDER_MAX_VALUE;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;* divider = uint16_t tmpDiv;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;Because PCC_PCCn_PCS=2 and inputClock=8Mhz, when the baud rate is 9600, it exceeds DIVIDER_MAX_VALUE, when TIMCMP [7:0]=0xff, the baud rate is wrong. If you want to configure the baud rate of 9600, you must reduce the inputClock, so when inputClock = 4Mhz, 115200 and 9600 are normal.&lt;/P&gt;&lt;P&gt;I also read the manual to show that I don't quite understand the calculation method in S32DS.&lt;/P&gt;&lt;P&gt;But according to this algorithm, if we want to set a large baud rate, we must increase the inputClock, and set a small baud rate, we must reduce the inputClock.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 13 May 2019 08:20:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/907255#M4646</guid>
      <dc:creator>liulei1</dc:creator>
      <dc:date>2019-05-13T08:20:47Z</dc:date>
    </item>
    <item>
      <title>Re: S32K FLEXIO UART</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/1462466#M15609</link>
      <description>&lt;P&gt;你好，我按照你这个修改，还是会出现问题。只是能正常运行的时间更久而已。还有什么解决办法么&lt;/P&gt;</description>
      <pubDate>Mon, 23 May 2022 13:14:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/1462466#M15609</guid>
      <dc:creator>lucaswang</dc:creator>
      <dc:date>2022-05-23T13:14:25Z</dc:date>
    </item>
    <item>
      <title>Re: S32K FLEXIO UART</title>
      <link>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/1512221#M17332</link>
      <description>&lt;P&gt;Hello NXP Technical Support:&lt;BR /&gt;Can you provide a DEMO about flexio's simulation of uart, which uses the interrupt method，Operation register, not SDK driver. I think the examples here are basically polling.，&lt;/P&gt;</description>
      <pubDate>Fri, 26 Aug 2022 09:18:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K-FLEXIO-UART/m-p/1512221#M17332</guid>
      <dc:creator>ywjack</dc:creator>
      <dc:date>2022-08-26T09:18:18Z</dc:date>
    </item>
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