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    <title>topic Re: S32k341 LPSPI Configuration in S32K</title>
    <link>https://community.nxp.com/t5/S32K/S32k341-LPSPI-Configuration/m-p/2039558#M45686</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/238723"&gt;@Omkar9903&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Could you please clarify what you mean by "communication is not functioning as expected"? Additionally, could you share an image of the signals to help us analyze the SPI behavior?&lt;/P&gt;
&lt;P&gt;As there is no available board with an S32K341 device, I will be using an S32K344EVB to verify your configuration and analyze the SPI behavior.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR, VaneB&lt;/P&gt;</description>
    <pubDate>Thu, 06 Feb 2025 20:45:54 GMT</pubDate>
    <dc:creator>VaneB</dc:creator>
    <dc:date>2025-02-06T20:45:54Z</dc:date>
    <item>
      <title>S32k341 LPSPI Configuration</title>
      <link>https://community.nxp.com/t5/S32K/S32k341-LPSPI-Configuration/m-p/2038788#M45656</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am currently working with the &lt;STRONG&gt;S32K341 microcontroller&lt;/STRONG&gt; and am using &lt;STRONG&gt;Design Studio version 3.6.0&lt;/STRONG&gt; with &lt;STRONG&gt;RTD version 5.0&lt;/STRONG&gt; for SPI communication with an external EEPROM. I have configured a &lt;STRONG&gt;5 MHz clock&lt;/STRONG&gt; and a &lt;STRONG&gt;5 Mbps baud rate&lt;/STRONG&gt; for the LPSPI protocol to interface with the external memory, but I am encountering some issues where the communication is not functioning as expected.&lt;/P&gt;&lt;H3&gt;SPI Pin Configuration:&lt;/H3&gt;&lt;P&gt;Here are the details of the SPI pin configuration:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;STRONG&gt;PTD6&lt;/STRONG&gt;: LPSPI0_PCS0 (Chip Select) - Digital Output&lt;/LI&gt;&lt;LI&gt;&lt;STRONG&gt;PTD10&lt;/STRONG&gt;: LPSPI0_SIN (SPI Input) - Digital Input&lt;/LI&gt;&lt;LI&gt;&lt;STRONG&gt;PTD11&lt;/STRONG&gt;: LPSPI0_SCK (SPI Clock) - Digital Output&lt;/LI&gt;&lt;LI&gt;&lt;STRONG&gt;PTD12&lt;/STRONG&gt;: LPSPI0_SOUT (SPI Output) - Digital Output&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;I have attached the relevant code for your reference. After reviewing the configuration, I wanted to ask if there might be any issues in the setup that could cause the failure, particularly with respect to the clock and baud rate configuration.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 05 Feb 2025 19:00:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32k341-LPSPI-Configuration/m-p/2038788#M45656</guid>
      <dc:creator>Omkar9903</dc:creator>
      <dc:date>2025-02-05T19:00:49Z</dc:date>
    </item>
    <item>
      <title>Re: S32k341 LPSPI Configuration</title>
      <link>https://community.nxp.com/t5/S32K/S32k341-LPSPI-Configuration/m-p/2039558#M45686</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/238723"&gt;@Omkar9903&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Could you please clarify what you mean by "communication is not functioning as expected"? Additionally, could you share an image of the signals to help us analyze the SPI behavior?&lt;/P&gt;
&lt;P&gt;As there is no available board with an S32K341 device, I will be using an S32K344EVB to verify your configuration and analyze the SPI behavior.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR, VaneB&lt;/P&gt;</description>
      <pubDate>Thu, 06 Feb 2025 20:45:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32k341-LPSPI-Configuration/m-p/2039558#M45686</guid>
      <dc:creator>VaneB</dc:creator>
      <dc:date>2025-02-06T20:45:54Z</dc:date>
    </item>
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