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    <title>S32Kのトピックcode can not get data from no_cache ram if source code runs in ITCM</title>
    <link>https://community.nxp.com/t5/S32K/code-can-not-get-data-from-no-cache-ram-if-source-code-runs-in/m-p/2030626#M45273</link>
    <description>&lt;P&gt;hello NXP experts:&lt;/P&gt;&lt;P&gt;I met a question about RAM access.&lt;/P&gt;&lt;P&gt;I modify the link file and locate all the source code in ITCM (all the hex is located from 0x00000000) and I take use of SPI and DMA to communicate with the external device.&lt;/P&gt;&lt;P&gt;when I set the value in global ram and trigger DMA transmit, there is no data in MTSR PIN， if I set a breakpoint after RAM data setting but before DMA transfer. there will be data in MTSR.&lt;/P&gt;&lt;P&gt;so I guess the root cause may be the ram refresh because ITCM runs high frequency than SRAM .&lt;/P&gt;&lt;P&gt;you can check the two pic below, if I go from breakpoint 1 to breakpoint 2 ,there is no contents in the MTSR(orange color)&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="1.png" style="width: 713px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/320372i13382B4B7C2CBF9B/image-size/large?v=v2&amp;amp;px=999" role="button" title="1.png" alt="1.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="2.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/320373iD9AAE73741F67CCD/image-size/large?v=v2&amp;amp;px=999" role="button" title="2.png" alt="2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;you can check the two pictures below and if I go from breakpoint 1 to&amp;nbsp;breakpoint 2 to&amp;nbsp;breakpoint 3(I just do a stop between breakpoint 1 and breakpoint 3) .&lt;/P&gt;&lt;P&gt;there is contents in the MTSR(orange color).&lt;/P&gt;&lt;P&gt;do you have any solution for this problem .thanks a lot&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="3.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/320375i7519B859E864E15F/image-size/large?v=v2&amp;amp;px=999" role="button" title="3.png" alt="3.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="4.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/320377i2C3BCCFDFA7065BC/image-size/large?v=v2&amp;amp;px=999" role="button" title="4.png" alt="4.png" /&gt;&lt;/span&gt;&lt;/P&gt;</description>
    <pubDate>Mon, 20 Jan 2025 11:16:10 GMT</pubDate>
    <dc:creator>yin_qiu</dc:creator>
    <dc:date>2025-01-20T11:16:10Z</dc:date>
    <item>
      <title>code can not get data from no_cache ram if source code runs in ITCM</title>
      <link>https://community.nxp.com/t5/S32K/code-can-not-get-data-from-no-cache-ram-if-source-code-runs-in/m-p/2030626#M45273</link>
      <description>&lt;P&gt;hello NXP experts:&lt;/P&gt;&lt;P&gt;I met a question about RAM access.&lt;/P&gt;&lt;P&gt;I modify the link file and locate all the source code in ITCM (all the hex is located from 0x00000000) and I take use of SPI and DMA to communicate with the external device.&lt;/P&gt;&lt;P&gt;when I set the value in global ram and trigger DMA transmit, there is no data in MTSR PIN， if I set a breakpoint after RAM data setting but before DMA transfer. there will be data in MTSR.&lt;/P&gt;&lt;P&gt;so I guess the root cause may be the ram refresh because ITCM runs high frequency than SRAM .&lt;/P&gt;&lt;P&gt;you can check the two pic below, if I go from breakpoint 1 to breakpoint 2 ,there is no contents in the MTSR(orange color)&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="1.png" style="width: 713px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/320372i13382B4B7C2CBF9B/image-size/large?v=v2&amp;amp;px=999" role="button" title="1.png" alt="1.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="2.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/320373iD9AAE73741F67CCD/image-size/large?v=v2&amp;amp;px=999" role="button" title="2.png" alt="2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;you can check the two pictures below and if I go from breakpoint 1 to&amp;nbsp;breakpoint 2 to&amp;nbsp;breakpoint 3(I just do a stop between breakpoint 1 and breakpoint 3) .&lt;/P&gt;&lt;P&gt;there is contents in the MTSR(orange color).&lt;/P&gt;&lt;P&gt;do you have any solution for this problem .thanks a lot&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="3.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/320375i7519B859E864E15F/image-size/large?v=v2&amp;amp;px=999" role="button" title="3.png" alt="3.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="4.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/320377i2C3BCCFDFA7065BC/image-size/large?v=v2&amp;amp;px=999" role="button" title="4.png" alt="4.png" /&gt;&lt;/span&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 20 Jan 2025 11:16:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/code-can-not-get-data-from-no-cache-ram-if-source-code-runs-in/m-p/2030626#M45273</guid>
      <dc:creator>yin_qiu</dc:creator>
      <dc:date>2025-01-20T11:16:10Z</dc:date>
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