https://community.nxp.com/t5/S32K/S32K3-FlexIO-SPI-Clk-Cs-time-control/m-p/2021993#M44782 <P>Hi&nbsp;<a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/227912">@Vandarkholme</a>.</P> <P>Unfortunately, the RTDs do not support to configure timing parameters for SPI protocol emulation with FlexIO. This limitation arises because the RTDs are restricted to use only 2 timers and 2 shift registers. One timer is dedicated to generate CS output signal and the other timer is used for the shift registers control and the SCK generation. In this way, there is no control logic to adjust the timing parameters to generate specific delays neither a register to modify the timers.</P> <P>Please let me know if you have more doubts.</P> <P>- RomanVR.</P> Fri, 03 Jan 2025 19:03:50 GMT RomanVR 2025-01-03T19:03:50Z https://community.nxp.com/t5/S32K/S32K3-FlexIO-SPI-Clk-Cs-time-control/m-p/2021492#M44731 <P>hello , I'm using flexio emulate SPI, but there's a problem -&gt; How to control flexio SPI's spitime like Lpspi? like clk2cs/ cs2cs</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Vandarkholme_0-1735864655241.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/317924iF360CB7795B12297/image-size/medium?v=v2&amp;px=400" role="button" title="Vandarkholme_0-1735864655241.png" alt="Vandarkholme_0-1735864655241.png" /></span><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Vandarkholme_1-1735864839095.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/317925i75C5C44BB4826EBF/image-size/medium?v=v2&amp;px=400" role="button" title="Vandarkholme_1-1735864839095.png" alt="Vandarkholme_1-1735864839095.png" /></span></P><P>&nbsp;</P> Fri, 03 Jan 2025 00:42:55 GMT https://community.nxp.com/t5/S32K/S32K3-FlexIO-SPI-Clk-Cs-time-control/m-p/2021492#M44731 Vandarkholme 2025-01-03T00:42:55Z https://community.nxp.com/t5/S32K/S32K3-FlexIO-SPI-Clk-Cs-time-control/m-p/2021993#M44782 <P>Hi&nbsp;<a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/227912">@Vandarkholme</a>.</P> <P>Unfortunately, the RTDs do not support to configure timing parameters for SPI protocol emulation with FlexIO. This limitation arises because the RTDs are restricted to use only 2 timers and 2 shift registers. One timer is dedicated to generate CS output signal and the other timer is used for the shift registers control and the SCK generation. In this way, there is no control logic to adjust the timing parameters to generate specific delays neither a register to modify the timers.</P> <P>Please let me know if you have more doubts.</P> <P>- RomanVR.</P> Fri, 03 Jan 2025 19:03:50 GMT https://community.nxp.com/t5/S32K/S32K3-FlexIO-SPI-Clk-Cs-time-control/m-p/2021993#M44782 RomanVR 2025-01-03T19:03:50Z