https://community.nxp.com/t5/S32K/FSEC-and-JTAGC/m-p/2019007#M44566 <P>Hi, team:</P><P>&nbsp; &nbsp; &nbsp;I want to confirm the security interaction with debug.&nbsp;</P><P>&nbsp; &nbsp; In <SPAN class="">S32K1xx Series Safety Manual</SPAN>&nbsp;, JTAGC TAP is disabled by pull JTAG_TMS low.</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="fan1234_1-1735028470073.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/317205iC6EF46AD6DC77AA6/image-size/medium?v=v2&amp;px=400" role="button" title="fan1234_1-1735028470073.png" alt="fan1234_1-1735028470073.png" /></span></P><P>&nbsp; &nbsp;and in the reference&nbsp;m<SPAN class="">anual, the debugging capabilities are disabled when flash memory security is active.</SPAN>&nbsp;</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="fan1234_2-1735028609123.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/317206i60EDEBE43040D4B3/image-size/medium?v=v2&amp;px=400" role="button" title="fan1234_2-1735028609123.png" alt="fan1234_2-1735028609123.png" /></span></P><P>i want to know if&nbsp;"JTAGC TAP disabled" is equivalent to "<SPAN class="">debugging capabilities</SPAN>"? the chip is S32K144, flash security is active and mass erase disabled.</P><P>&nbsp;&nbsp;</P> Tue, 24 Dec 2024 08:32:09 GMT fan1234 2024-12-24T08:32:09Z https://community.nxp.com/t5/S32K/FSEC-and-JTAGC/m-p/2019007#M44566 <P>Hi, team:</P><P>&nbsp; &nbsp; &nbsp;I want to confirm the security interaction with debug.&nbsp;</P><P>&nbsp; &nbsp; In <SPAN class="">S32K1xx Series Safety Manual</SPAN>&nbsp;, JTAGC TAP is disabled by pull JTAG_TMS low.</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="fan1234_1-1735028470073.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/317205iC6EF46AD6DC77AA6/image-size/medium?v=v2&amp;px=400" role="button" title="fan1234_1-1735028470073.png" alt="fan1234_1-1735028470073.png" /></span></P><P>&nbsp; &nbsp;and in the reference&nbsp;m<SPAN class="">anual, the debugging capabilities are disabled when flash memory security is active.</SPAN>&nbsp;</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="fan1234_2-1735028609123.png" style="width: 400px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/317206i60EDEBE43040D4B3/image-size/medium?v=v2&amp;px=400" role="button" title="fan1234_2-1735028609123.png" alt="fan1234_2-1735028609123.png" /></span></P><P>i want to know if&nbsp;"JTAGC TAP disabled" is equivalent to "<SPAN class="">debugging capabilities</SPAN>"? the chip is S32K144, flash security is active and mass erase disabled.</P><P>&nbsp;&nbsp;</P> Tue, 24 Dec 2024 08:32:09 GMT https://community.nxp.com/t5/S32K/FSEC-and-JTAGC/m-p/2019007#M44566 fan1234 2024-12-24T08:32:09Z