topic Re: S32K3 ECC error detection in S32K

S32K3 ECC error detection

DGB — Tue, 10 Dec 2024 08:33:05 GMT

Hi,

I have a question in terms of single/double-bit error detection. Taking into account following statement from S32K3 RM my understanding is that for DFLASH and PFLASH there is possibility to detect only double bit failure, since single bit errors are automatically corrected. Is this correct understanding?

What registers should be taken into account in order to detect double-bit errors for DFLASH and PFLASH?

Re: S32K3 ECC error detection

danielmartynek — Wed, 11 Dec 2024 08:54:00 GMT

Hi @DGB,

The Error Reporting Module (ERM) can detect single-bit errors on the Flash memory too.

And the Embedded Flash Memory (c40asf) also informs about single-bit errors.

Module Configuration Status (MCRS[SBC]).

Regards,

Daniel

Re: S32K3 ECC error detection

DGB — Tue, 17 Dec 2024 12:58:54 GMT

Thank you for the response. So in order to detect any single or double bit errors on DFLASH and PFLASH it would be sufficient to pull MCRS[SBC] and MCRS[EER] values periodically during runtime?

Re: S32K3 ECC error detection

danielmartynek — Tue, 17 Dec 2024 14:27:03 GMT

Hi @DGB,

This is question on functional safety.

Refer to the S32K3xx Safety Manual or ask in the SafeAssure community

https://community.nxp.com/t5/SafeAssure-Community/gh-p/52177

Regards,

Daniel