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    <title>S32KのトピックRe: Disturbance on Chip Select line</title>
    <link>https://community.nxp.com/t5/S32K/Disturbance-on-Chip-Select-line/m-p/2009698#M44005</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/243600"&gt;@IsaulO&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Have you tested my code that I have shared in the post, For me I am getting some disturbances on the Enable Line. Can you share the code that you have tested or the configurations that you have done in the logic analyzer configuration side.&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 09 Dec 2024 04:54:32 GMT</pubDate>
    <dc:creator>Shivaprasad_sp</dc:creator>
    <dc:date>2024-12-09T04:54:32Z</dc:date>
    <item>
      <title>Disturbance on Chip Select line</title>
      <link>https://community.nxp.com/t5/S32K/Disturbance-on-Chip-Select-line/m-p/2006177#M43845</link>
      <description>&lt;P&gt;I am working on SPI on the S32k3x Q172 Board the data is getting disturbed due to Clock/Enable line disturbances I have connected the SPI lines to the logic analyser i have observed a pattern that the clock pulse and enable line is disturbing and then data is getting corrupted ,could any one give me a solution to configure the SPI Master on S32k344 .&lt;/P&gt;&lt;P&gt;Sometimes I am getting the correct data but most of the time i am getting the error or incorrect data i am sending 0x1,0x2,0x3,0x4,0x5,0x6,0x7 and most of the time i am getting corrupted data i am attaching the images&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxp1.PNG" style="width: 822px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/313809i845CEB4535CFD661/image-size/large?v=v2&amp;amp;px=999" role="button" title="nxp1.PNG" alt="nxp1.PNG" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxp2.PNG" style="width: 960px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/313808iB2A35157F9366775/image-size/large?v=v2&amp;amp;px=999" role="button" title="nxp2.PNG" alt="nxp2.PNG" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxp3.PNG" style="width: 787px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/313811i85267E3DC2130D70/image-size/large?v=v2&amp;amp;px=999" role="button" title="nxp3.PNG" alt="nxp3.PNG" /&gt;&lt;/span&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 03 Dec 2024 14:26:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Disturbance-on-Chip-Select-line/m-p/2006177#M43845</guid>
      <dc:creator>Shivaprasad_sp</dc:creator>
      <dc:date>2024-12-03T14:26:27Z</dc:date>
    </item>
    <item>
      <title>Re: Disturbance on Chip Select line</title>
      <link>https://community.nxp.com/t5/S32K/Disturbance-on-Chip-Select-line/m-p/2008324#M43939</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/242059"&gt;@Shivaprasad_sp&lt;/a&gt;&lt;/P&gt;
&lt;P&gt;In this same post I am responding to the case &lt;A href="https://community.nxp.com/t5/S32K/Incorrect-data-on-SPI-S32k3x-q172-EVB/td-p/2005891" target="_blank" rel="noopener"&gt;Incorrect data on SPI S32k3x q172 EVB - NXP Community.&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;From the images shared above we observe that the message coming from the Slave changes between images, we suggest you check the configuration of your Slave and Analyzer.&lt;/P&gt;
&lt;P&gt;We have tested data transmission from the master (S32K344) and observed consistent behavior. See the image below:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="IsaulO_1-1733413668806.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/314356i61B9AD74655F887D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="IsaulO_1-1733413668806.png" alt="IsaulO_1-1733413668806.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Also, we recommend working with the latest software versions. For better reference, you can check the following example on how to work with LPSPI with low-level drivers and high-level drivers.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K344-SPI-Transmit-amp-Receive-Using-DMA-DS3-5-RTD500/ta-p/1992224" target="_blank" rel="noopener"&gt;Example S32K344 SPI Transmit &amp;amp; Receive Using DMA DS3.5 RTD500 - NXP Community&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Hope it helps you. &lt;BR /&gt;BR,&lt;BR /&gt;IsaulO.&lt;/P&gt;</description>
      <pubDate>Thu, 05 Dec 2024 15:50:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Disturbance-on-Chip-Select-line/m-p/2008324#M43939</guid>
      <dc:creator>IsaulO</dc:creator>
      <dc:date>2024-12-05T15:50:37Z</dc:date>
    </item>
    <item>
      <title>Re: Disturbance on Chip Select line</title>
      <link>https://community.nxp.com/t5/S32K/Disturbance-on-Chip-Select-line/m-p/2009698#M44005</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/243600"&gt;@IsaulO&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Have you tested my code that I have shared in the post, For me I am getting some disturbances on the Enable Line. Can you share the code that you have tested or the configurations that you have done in the logic analyzer configuration side.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 09 Dec 2024 04:54:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Disturbance-on-Chip-Select-line/m-p/2009698#M44005</guid>
      <dc:creator>Shivaprasad_sp</dc:creator>
      <dc:date>2024-12-09T04:54:32Z</dc:date>
    </item>
    <item>
      <title>Re: Disturbance on Chip Select line</title>
      <link>https://community.nxp.com/t5/S32K/Disturbance-on-Chip-Select-line/m-p/2011271#M44106</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/242059"&gt;@Shivaprasad_sp&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The example we tested was the "Lpspi_Ip_Transfer_S32K344.zip" project attached in the link previously shared.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K344-SPI-Transmit-amp-Receive-Using-DMA-DS3-5-RTD500/ta-p/1992224" target="_blank" rel="noopener"&gt;Example S32K344 SPI Transmit &amp;amp; Receive Using DMA DS3.5 RTD500 - NXP Community&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regarding the Logic Analyzer, we used the default configuration:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="IsaulO_0-1733855514390.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/315128iEF6C643F83FC4886/image-size/medium?v=v2&amp;amp;px=400" role="button" title="IsaulO_0-1733855514390.png" alt="IsaulO_0-1733855514390.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Hope it helps you. &lt;BR /&gt;BR,&lt;BR /&gt;IsaulO. &lt;/P&gt;</description>
      <pubDate>Tue, 10 Dec 2024 18:39:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/Disturbance-on-Chip-Select-line/m-p/2011271#M44106</guid>
      <dc:creator>IsaulO</dc:creator>
      <dc:date>2024-12-10T18:39:47Z</dc:date>
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