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    <title>topic Re: NVIC structure in S32K</title>
    <link>https://community.nxp.com/t5/S32K/NVIC-structure/m-p/2004474#M43752</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/232680"&gt;@paolonese&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;If you are working with bare metal, you can find the interrupt vector numbers in, for example, &lt;STRONG&gt;S32K344_COMMON.h&lt;/STRONG&gt;, the S32_NVIC register masks in &lt;STRONG&gt;S32K344_NVIC.h&lt;/STRONG&gt;, and the functions that manage interrupts and exceptions through the NVIC in &lt;STRONG&gt;nvic.h/nvic.c&lt;/STRONG&gt;.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR, VaneB&lt;/P&gt;</description>
    <pubDate>Fri, 29 Nov 2024 21:37:36 GMT</pubDate>
    <dc:creator>VaneB</dc:creator>
    <dc:date>2024-11-29T21:37:36Z</dc:date>
    <item>
      <title>NVIC structure</title>
      <link>https://community.nxp.com/t5/S32K/NVIC-structure/m-p/2004286#M43743</link>
      <description>&lt;P&gt;Hi, in S32DS.3.5 IDE, I can't find the structure for S32_NVIC.&lt;/P&gt;&lt;P&gt;How should I setup the interrupt source?&lt;/P&gt;&lt;P&gt;Thanks in advance.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 29 Nov 2024 10:24:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/NVIC-structure/m-p/2004286#M43743</guid>
      <dc:creator>paolonese</dc:creator>
      <dc:date>2024-11-29T10:24:52Z</dc:date>
    </item>
    <item>
      <title>Re: NVIC structure</title>
      <link>https://community.nxp.com/t5/S32K/NVIC-structure/m-p/2004474#M43752</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/232680"&gt;@paolonese&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;If you are working with bare metal, you can find the interrupt vector numbers in, for example, &lt;STRONG&gt;S32K344_COMMON.h&lt;/STRONG&gt;, the S32_NVIC register masks in &lt;STRONG&gt;S32K344_NVIC.h&lt;/STRONG&gt;, and the functions that manage interrupts and exceptions through the NVIC in &lt;STRONG&gt;nvic.h/nvic.c&lt;/STRONG&gt;.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR, VaneB&lt;/P&gt;</description>
      <pubDate>Fri, 29 Nov 2024 21:37:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/NVIC-structure/m-p/2004474#M43752</guid>
      <dc:creator>VaneB</dc:creator>
      <dc:date>2024-11-29T21:37:36Z</dc:date>
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