S32K344 cant be reset or flashed

Svetoslav — Mon, 25 Nov 2024 12:44:09 GMT

Hello,

I have an MR-CANHUBK3 board with an S32K344.

I uploaded a Zephyr code with clock settings I was testing with changes in the zephyrproject/modules/hal/nxp/s32/soc/s32k344/src/Clock_Ip_Cfg.c file:

{

1U, /* clkConfigId */

(NULL_PTR), /* Register data if register value optimization is enabled */

0U, /* ircoscsCount */

0U, /* xoscsCount */

0U, /* pllsCount */

3U, /* selectorsCount */

3U, /* dividersCount */

0U, /* dividerTriggersCount */

0U, /* fracDivsCount */

2U, /* extClksCount */

100U, /* gatesCount */

0U, /* pcfsCount */

4U, /* cmusCount */

6U, /* configureFrequenciesCount */

(&Clock_Ip_IrcoscConfigurations_0), /* Ircosc configurations */

(&Clock_Ip_XoscConfigurations_0), /* Xosc configurations */

(&Clock_Ip_PllConfigurations_0), /* Pll configurations */

(&Clock_Ip_SelectorConfigurations_1), /* Selectors configurations */

(&Clock_Ip_DividerConfigurations_1), /* dividers configurations */

(NULL_PTR), /* dividerTriggers configurations */

(NULL_PTR), /* fracDivs configurations */

(&Clock_Ip_ExtClkConfigurations_1), /* extClks configurations */

(&Clock_Ip_GatesConfigurations_1), /* gates configurations */

(NULL_PTR), /* pcfs configurations */

(&Clock_Ip_CmuConfigurations_1), /* cmus configurations */

(&Clock_Ip_ConfiguredFrequencyConfigurations_1), /* configureFrequencies configurations */

After that, I cannot upload any code to the device. when I try west flash it gives me the following error:

I also tried deleting the flashed code through J-Link and I got the following:

JLinkExe
SEGGER J-Link Commander V8.10f (Compiled Nov 6 2024 16:11:03)
DLL version V8.10f, compiled Nov 6 2024 16:09:58

Connecting to J-Link via USB...O.K.
Firmware: J-Link V10 compiled Jan 30 2023 11:28:07
Hardware version: V10.10
J-Link uptime (since boot): N/A (Not supported by this model)
S/N: 600109715
License(s): RDI, FlashBP, FlashDL, JFlash, GDB
VTref=3.328V

Type "connect" to establish a target connection, '?' for help
J-Link>connect
Please specify device / core. <Default>: S32K344
Type '?' for selection dialog
Device>connect S32K344
Please specify target interface:
J) JTAG (Default)
S) SWD
F) FINE
I) ICSP
C) C2
T) cJTAG
TIF>SWD
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>4000
The selected device "connect" is unknown to this software version.
Device "S32K344" selected.

Connecting to target via SWD
ConfigTargetSettings() start
ConfigTargetSettings() end - Took 30us
InitTarget() start
SDA_AP detected
Unlocking device if necessary...
Device is not locked. Proceeding without the unlock procedure.
Checking if debug access is already enabled...
Debug access is not enabled yet. Performing enable debug access sequence...
Debug access enabled
Checking if HSE firmware is installed...
HSE firmware detected (SWAP enabled)
Checking if Cortex-M7_0 and Cortex-M7_1 are operating in lockstep mode
Lock step mode enabled
InitTarget() end - Took 104ms
Found SW-DP with ID 0x6BA02477
DPIDR: 0x6BA02477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: MEM-AP (IDR: Not set, ADDR: 0x00000000)
AP[1]: APB-AP (IDR: Not set, ADDR: 0x00000000)
AP[2]: MEM-AP (IDR: Not set, ADDR: 0x00000000)
AP[3]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[4]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[5]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[6]: MEM-AP (IDR: Not set, ADDR: 0x00000000)
AP[7]: MEM-AP (IDR: Not set, ADDR: 0x00000000)
AP[4]: Skipped ROMBASE read. CoreBaseAddr manually set by user
AP[4]: Skipped. Could not read CPUID register
Attach to CPU failed. Executing connect under reset.
DPIDR: 0x6BA02477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: MEM-AP (IDR: Not set, ADDR: 0x00000000)
AP[1]: APB-AP (IDR: Not set, ADDR: 0x00000000)
AP[2]: MEM-AP (IDR: Not set, ADDR: 0x00000000)
AP[3]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[4]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[5]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[6]: MEM-AP (IDR: Not set, ADDR: 0x00000000)
AP[7]: MEM-AP (IDR: Not set, ADDR: 0x00000000)
AP[4]: Skipped ROMBASE read. CoreBaseAddr manually set by user
AP[4]: Skipped. Could not read CPUID register
Could not find core in Coresight setup
ConfigTargetSettings() start
ConfigTargetSettings() end - Took 40us
InitTarget() start
SDA_AP detected
Unlocking device if necessary...
Device is not locked. Proceeding without the unlock procedure.
Checking if debug access is already enabled...
Debug access is not enabled yet. Performing enable debug access sequence...
Debug access enabled
Checking if HSE firmware is installed...
HSE firmware not installed
Checking if Cortex-M7_0 and Cortex-M7_1 are operating in lockstep mode
Lock step mode enabled
InitTarget() end - Took 15.1ms
Found SW-DP with ID 0x6BA02477
DPIDR: 0x6BA02477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: MEM-AP (IDR: Not set, ADDR: 0x00000000)
AP[1]: APB-AP (IDR: Not set, ADDR: 0x00000000)
AP[2]: MEM-AP (IDR: Not set, ADDR: 0x00000000)
AP[3]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[4]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[5]: AHB-AP (IDR: Not set, ADDR: 0x00000000)
AP[6]: MEM-AP (IDR: Not set, ADDR: 0x00000000)
AP[7]: MEM-AP (IDR: Not set, ADDR: 0x00000000)
AP[4]: Skipped ROMBASE read. CoreBaseAddr manually set by user
AP[4]: Core found

****** Error: DAP error while reading AIRCR.
Error occurred: Could not connect to the target device.
For troubleshooting steps visit: https://wiki.segger.com/J-Link_Troubleshooting
J-Link>10
Unknown command. '?' for help.

I tried resetting the board, tried with a lower frequency to connect through J-Link but nothing is working.

I suppose I uploaded something that messes up the clocks, but is there any way to fix it so I can erase the code or do a factory reset on the board?

Re: S32K344 cant be reset or flashed

petervlna — Tue, 26 Nov 2024 05:29:53 GMT

Hello,

It does not looks like you have messed up something in micro with SW as micro is not secured / locked.

It rather looks like some debugger settings which are needed to be performed. Since I am familiar with it Segger I cant comment here.

You can try erasing the micro via Lauterbach or PEMicro debuggers.

Here I have found some info on that from Segger and it looks the issue is in configuration of memory mapped registers:

https://forum.segger.com/index.php/Thread/3206-SOLVED-DAP-error-while-reading-aircr-cpuid-register/

Best regards,

Peter

S32KのトピックS32K344 cant be reset or flashed

S32K344 cant be reset or flashed

Re: S32K344 cant be reset or flashed