<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>S32KのトピックRe: EMIOS PWM configuration in S32K312</title>
    <link>https://community.nxp.com/t5/S32K/EMIOS-PWM-configuration-in-S32K312/m-p/1997788#M43432</link>
    <description>&lt;P&gt;Have a look at:&lt;BR /&gt;&lt;A href="https://community.nxp.com/t5/S32-Design-Studio-Knowledge-Base/SIUL2-external-interrupt-example-project-using-S32K3-RTD-without/ta-p/1552335" target="_self"&gt;SIUL2 external interrupt example project using S32K3 RTD without AUTOSAR&lt;/A&gt;&lt;BR /&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-EIRQ-Interrupt-DS3-5-RTD300/ta-p/1787860" target="_self"&gt;Example S32K312 EIRQ Interrupt DS3.5 RTD300&lt;/A&gt;&lt;/P&gt;</description>
    <pubDate>Wed, 20 Nov 2024 07:02:19 GMT</pubDate>
    <dc:creator>Robin_Shen</dc:creator>
    <dc:date>2024-11-20T07:02:19Z</dc:date>
    <item>
      <title>EMIOS PWM configuration in S32K312</title>
      <link>https://community.nxp.com/t5/S32K/EMIOS-PWM-configuration-in-S32K312/m-p/1996540#M43386</link>
      <description>&lt;P&gt;i Team,&lt;/P&gt;&lt;P&gt;We are using S32k312 MCU and we tried to configure Emios PWM using S32 Design Studio 3.5. We were not able to generate PWM signals. Please find the configuration in the below attachment and kindly correct if necessary. We are working on Non-Autosar Mode and we are using 6 PWM channels and the channels are given below.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="SasiKumar_Vengam_0-1731946197107.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/311064i2D24BED9540EC33E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="SasiKumar_Vengam_0-1731946197107.png" alt="SasiKumar_Vengam_0-1731946197107.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;SasiKumar_Vengam_0-1731946197107.png&lt;/span&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="SasiKumar_Vengam_1-1731946240011.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/311065i1DBC6CB2DD2DDC40/image-size/medium?v=v2&amp;amp;px=400" role="button" title="SasiKumar_Vengam_1-1731946240011.png" alt="SasiKumar_Vengam_1-1731946240011.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;SasiKumar_Vengam_1-1731946240011.png&lt;/span&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="SasiKumar_Vengam_2-1731946281847.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/311066i589A27171007B1DD/image-size/medium?v=v2&amp;amp;px=400" role="button" title="SasiKumar_Vengam_2-1731946281847.png" alt="SasiKumar_Vengam_2-1731946281847.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;SasiKumar_Vengam_2-1731946281847.png&lt;/span&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="SasiKumar_Vengam_3-1731946299112.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/311067i675668BA1708C810/image-size/medium?v=v2&amp;amp;px=400" role="button" title="SasiKumar_Vengam_3-1731946299112.png" alt="SasiKumar_Vengam_3-1731946299112.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;SasiKumar_Vengam_3-1731946299112.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;DIV&gt;Emios_Mcl_Ip_Init (EMIOS_1,&amp;amp;Emios_Mcl_Ip_1_Config_BOARD_INITPERIPHERALS);&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Emios_Pwm_Ip_InitChannel(EMIOS_PWM_IP_I0_CH0_CFG,&amp;amp;Emios_Pwm_Ip_I0_Ch0);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Emios_Pwm_Ip_InitChannel(EMIOS_0,&amp;amp;Emios_Pwm_Ip_I0_Ch1);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Emios_Pwm_Ip_InitChannel(EMIOS_0,&amp;amp;Emios_Pwm_Ip_I0_Ch2);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Emios_Pwm_Ip_InitChannel(EMIOS_0,&amp;amp;Emios_Pwm_Ip_I0_Ch3);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Emios_Pwm_Ip_InitChannel(EMIOS_0,&amp;amp;Emios_Pwm_Ip_I0_Ch4);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;// Emios_Pwm_Ip_InitChannel(EMIOS_1,&amp;amp;Emios_Pwm_Ip_I1_Ch0);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;Note :-&amp;nbsp;Emios_Pwm_Ip_I1_Ch0&lt;/STRONG&gt; channel&amp;nbsp; can't be able to init successfully. In below function code is getting terminate due to&amp;nbsp;Base-&amp;gt;CH.UC[Channel].C&amp;nbsp; value is zero but we have initalized&lt;/DIV&gt;&lt;DIV&gt;Emios_Mcl_Ip_Init() fn below and find the config attached image MCL_IP;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;Emios_Pwm_Ip_MasterBusModeType Emios_Pwm_Ip_GetChannelPwmMode( const Emios_Pwm_Ip_HwAddrType *const Base,&lt;BR /&gt;uint8 Channel)&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;while(1)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;//Emios_Mcl_Ip_SetCounterBusPeriod(0,23,32768);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Status = Emios_Pwm_Ip_SetDutyCycle(EMIOS_PWM_IP_I0_CH0_CFG,EMIOS_PWM_IP_I0_CH0_CFG,3268);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;sprintf( (char*)message, "Status_0&amp;nbsp; = %d&amp;nbsp; &amp;nbsp;\n",Status);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Uart_logs_transmit(message);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;TestDelay(DELAY_TIMER);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;DutyCycle = Emios_Pwm_Ip_GetDutyCycle(EMIOS_0,EMIOS_PWM_IP_I0_CH0_CFG);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;sprintf( (char*)message, "DutyCycle&amp;nbsp; = %d&amp;nbsp; &amp;nbsp;\n",DutyCycle);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Uart_logs_transmit(message);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Status = Emios_Pwm_Ip_SetDutyCycle(EMIOS_0,EMIOS_PWM_IP_I0_CH1_CFG,32768);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;TestDelay(DELAY_TIMER);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Status = Emios_Pwm_Ip_SetDutyCycle(EMIOS_0,EMIOS_PWM_IP_I0_CH2_CFG,32768);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;TestDelay(DELAY_TIMER);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Status = Emios_Pwm_Ip_SetDutyCycle(EMIOS_0,EMIOS_PWM_IP_I0_CH3_CFG,32768);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;TestDelay(DELAY_TIMER);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Status = Emios_Pwm_Ip_SetDutyCycle(EMIOS_0,EMIOS_PWM_IP_I0_CH4_CFG,32768);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;TestDelay(DELAY_TIMER);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Status = Emios_Pwm_Ip_SetDutyCycle(EMIOS_0,EMIOS_PWM_IP_I1_CH0_CFG,32768);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;If we have missed anything, Let us know.&lt;/SPAN&gt;&lt;/DIV&gt;</description>
      <pubDate>Mon, 18 Nov 2024 16:26:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/EMIOS-PWM-configuration-in-S32K312/m-p/1996540#M43386</guid>
      <dc:creator>SasiKumar_Vengam</dc:creator>
      <dc:date>2024-11-18T16:26:24Z</dc:date>
    </item>
    <item>
      <title>Re: EMIOS PWM configuration in S32K312</title>
      <link>https://community.nxp.com/t5/S32K/EMIOS-PWM-configuration-in-S32K312/m-p/1997677#M43423</link>
      <description>&lt;P&gt;&lt;SPAN&gt;If it is convenient, please send me the simple test project for a quick test.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 20 Nov 2024 04:33:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/EMIOS-PWM-configuration-in-S32K312/m-p/1997677#M43423</guid>
      <dc:creator>Robin_Shen</dc:creator>
      <dc:date>2024-11-20T04:33:22Z</dc:date>
    </item>
    <item>
      <title>Re: EMIOS PWM configuration in S32K312</title>
      <link>https://community.nxp.com/t5/S32K/EMIOS-PWM-configuration-in-S32K312/m-p/1997722#M43427</link>
      <description>Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/35076"&gt;@robin&lt;/a&gt;,&lt;BR /&gt;We have configured the PWM correctly using an example uploaded in the Community. We need to configure a GPIO pin as an Interrupt, could you please share any examples on this along with the ISR function implementation.&lt;BR /&gt;For your reference, we are using PTB1, PTC8 and PTC9 as GPIO input of the S32K312 MCU.&lt;BR /&gt;Thanks.</description>
      <pubDate>Wed, 20 Nov 2024 05:46:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/EMIOS-PWM-configuration-in-S32K312/m-p/1997722#M43427</guid>
      <dc:creator>SasiKumar_Vengam</dc:creator>
      <dc:date>2024-11-20T05:46:41Z</dc:date>
    </item>
    <item>
      <title>Re: EMIOS PWM configuration in S32K312</title>
      <link>https://community.nxp.com/t5/S32K/EMIOS-PWM-configuration-in-S32K312/m-p/1997788#M43432</link>
      <description>&lt;P&gt;Have a look at:&lt;BR /&gt;&lt;A href="https://community.nxp.com/t5/S32-Design-Studio-Knowledge-Base/SIUL2-external-interrupt-example-project-using-S32K3-RTD-without/ta-p/1552335" target="_self"&gt;SIUL2 external interrupt example project using S32K3 RTD without AUTOSAR&lt;/A&gt;&lt;BR /&gt;&lt;A href="https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-EIRQ-Interrupt-DS3-5-RTD300/ta-p/1787860" target="_self"&gt;Example S32K312 EIRQ Interrupt DS3.5 RTD300&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 20 Nov 2024 07:02:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/EMIOS-PWM-configuration-in-S32K312/m-p/1997788#M43432</guid>
      <dc:creator>Robin_Shen</dc:creator>
      <dc:date>2024-11-20T07:02:19Z</dc:date>
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  </channel>
</rss>

