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    <title>S32KのトピックRe: S32K312 SWT0 interrupt</title>
    <link>https://community.nxp.com/t5/S32K/S32K312-SWT0-interrupt/m-p/1995962#M43366</link>
    <description>&lt;P&gt;I think there is no need to call an interrupt flag clear function in the ISR， and i have read the pendding&amp;nbsp; interrupt flag register, it represent zero at the point of SWT.&lt;/P&gt;</description>
    <pubDate>Mon, 18 Nov 2024 04:45:24 GMT</pubDate>
    <dc:creator>jhuang1</dc:creator>
    <dc:date>2024-11-18T04:45:24Z</dc:date>
    <item>
      <title>S32K312 SWT0 interrupt</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-SWT0-interrupt/m-p/1988427#M42944</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;Two products among the whole 700+ products in my project encounterred a problem, the SWT0 interrupt in the two product continue to trigger after the SWT0 had been disabled. I have to disable the&amp;nbsp; SWT interrupt instead of just disabling the SWT0. Is there a possibility that the SWT interrupt run out of control?&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 06 Nov 2024 03:03:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-SWT0-interrupt/m-p/1988427#M42944</guid>
      <dc:creator>jhuang1</dc:creator>
      <dc:date>2024-11-06T03:03:04Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312 SWT0 interrupt</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-SWT0-interrupt/m-p/1990181#M43027</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/217679"&gt;@jhuang1&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Can you share all the SWT register values while it is in the interrupt routine?&lt;/P&gt;
&lt;P&gt;Is the TIF flag set while WEN = 0?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thank you,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
      <pubDate>Thu, 07 Nov 2024 12:41:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-SWT0-interrupt/m-p/1990181#M43027</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2024-11-07T12:41:08Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312 SWT0 interrupt</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-SWT0-interrupt/m-p/1990625#M43042</link>
      <description>&lt;P&gt;The main registers value in the interrupt routine:&lt;/P&gt;&lt;P&gt;CR:0xFF000006&lt;/P&gt;&lt;P&gt;IR:1&lt;/P&gt;&lt;P&gt;TO:0x100&lt;/P&gt;&lt;P&gt;WN:0&lt;/P&gt;</description>
      <pubDate>Fri, 08 Nov 2024 01:22:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-SWT0-interrupt/m-p/1990625#M43042</guid>
      <dc:creator>jhuang1</dc:creator>
      <dc:date>2024-11-08T01:22:19Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312 SWT0 interrupt</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-SWT0-interrupt/m-p/1990955#M43056</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/217679"&gt;@jhuang1&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;Does it trigger periodically as usual or does the flag stays continuously asserted?&lt;/P&gt;
&lt;P&gt;Such unpredictable behavior can be expected if the system clock configuration is incorrect.&lt;/P&gt;
&lt;P&gt;Is it configured precisely to one of the clock options listed in the RM?&lt;/P&gt;
&lt;P&gt;E.g. Table 151. Option A - High Performance mode (CORE_CLK @ 160 MHz).&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thank you&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 08 Nov 2024 08:52:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-SWT0-interrupt/m-p/1990955#M43056</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2024-11-08T08:52:51Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312 SWT0 interrupt</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-SWT0-interrupt/m-p/1991406#M43082</link>
      <description>&lt;P&gt;The flag stays continuously asserted, and the clock should be fine, the other functions such as uart or spi works fine after the swt interrupt being disabled. There should be some other errors occure if clock configuration is incorrect.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 11 Nov 2024 01:34:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-SWT0-interrupt/m-p/1991406#M43082</guid>
      <dc:creator>jhuang1</dc:creator>
      <dc:date>2024-11-11T01:34:17Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312 SWT0 interrupt</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-SWT0-interrupt/m-p/1995370#M43334</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/217679"&gt;@jhuang1&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;I understand the flag cannot be cleared.&lt;/P&gt;
&lt;P&gt;I have been trying to replicate it but with no luck.&lt;/P&gt;
&lt;P&gt;Can you make sure the flag is cleared right before the SWT is disabled?&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thank you&lt;/P&gt;</description>
      <pubDate>Fri, 15 Nov 2024 09:49:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-SWT0-interrupt/m-p/1995370#M43334</guid>
      <dc:creator>danielmartynek</dc:creator>
      <dc:date>2024-11-15T09:49:46Z</dc:date>
    </item>
    <item>
      <title>Re: S32K312 SWT0 interrupt</title>
      <link>https://community.nxp.com/t5/S32K/S32K312-SWT0-interrupt/m-p/1995962#M43366</link>
      <description>&lt;P&gt;I think there is no need to call an interrupt flag clear function in the ISR， and i have read the pendding&amp;nbsp; interrupt flag register, it represent zero at the point of SWT.&lt;/P&gt;</description>
      <pubDate>Mon, 18 Nov 2024 04:45:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/S32K312-SWT0-interrupt/m-p/1995962#M43366</guid>
      <dc:creator>jhuang1</dc:creator>
      <dc:date>2024-11-18T04:45:24Z</dc:date>
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