QuadSPI for RAM device

pchady — Wed, 23 Oct 2024 19:46:23 GMT

On the S32K396, how do I configure the QuadSPI to use a hyperRAM device?

Essentially I just need the AHB to perform the memory-mapped passthrough to the SPI bus, without having to manage the flash programming sequences.

Most of the information and examples I've seen so far are flash-centric, and it's unclear which features/settings need to be disabled.

In the 3.0.0 update of drivers, I tried the Example project Qspi_Ip_Example_S32K396. This gets the pins for Qspi set up, and sets up the buffers. I then bypassed the erase and program functions, and added simple memory read loops, to access the AHB mem range starting at 6800000.

It appeared to read a full 8MB from the device (of uninitialized data). It would then write and read back values only in a small section, about 4KB. So I think this was just accessing the intermediate buffer but not writing out to the device.

I have just tried the new 5.0.0 update for the drivers and same example project, But now any read attempt fails with bus error.

In chapter 80 of ref manual, for qspi, it's unclear if the processes for flash support should be turned off, or if they should stay on, and a configuration filled out for RAM use (e.g. setting delay times to 0, etc)

Any help appreciated!

Re: QuadSPI for RAM device

pchady — Wed, 23 Oct 2024 19:48:00 GMT

I forgot to mention.. S32DS keeps saying the Quadspi configuration tool is unavailable for K396 processor.

Is that correct? not (yet) supported?

Re: QuadSPI for RAM device

davidtosenovjan — Fri, 25 Oct 2024 12:37:37 GMT

Yes, it is correct. This tool is only related to flash-less devices i.e. microprocessors which are supposed to boot from QuadSPI.

topic Re: QuadSPI for RAM device in S32K

QuadSPI for RAM device

Re: QuadSPI for RAM device

Re: QuadSPI for RAM device