topic [s32k312]Read reset reason by RTD function, HSE_SWT_RST is occurred after a functional reset. in S32K

[s32k312]Read reset reason by RTD function, HSE_SWT_RST is occurred after a functional reset.

mym — Sat, 12 Oct 2024 10:04:43 GMT

Get reset reason Timing:

After RTD power module is initialized by function Power_Ip_Init, I read reset reason by RTD function Power_Ip_GetResetRawValue or Power_Ip_GetResetReason.

First times

After cold power on, ResetRawValue is 8000, ResetReason is 0(MCU_POWER_ON_RESET).

Mcu could be working well, and then perform a functional reset by RTD function BSP_PwrSoftwareReset, Reset type is configurated to MCU_FUNC_RESET.

Second times

After MCU is reset due to functional reset，ResetRawValue is 800, ResetReason is 26(MCU_SW_FUNC_RESET).

Mcu keeps working about 1s, and then is reset due to unknown reason.

Third and more times

After MCU is reset due to unknown reason，ResetRawValue is 200, ResetReason is 24(MCU_HSE_SWT_RST_RESET).

Mcu keeps working about 1s, and then is reset due to unknown reason.

Addition:

if I comment process for clearing MC_RGM.DES in RTD function Power_Ip_MC_RGM_GetResetRawValue and Power_Ip_MC_RGM_GetResetReason, MC_RGM.DES is keep F_POR=1,

MCU will not be reset due to unknown reason after the functional reset.

Refence source:

Power_Ip_ResetType reset_reason;

Power_Ip_RawResetType reset_raw_reason;

int main()

{

Power_Ip_Init(&Power_Ip_HwIPsConfigPB);

Wkpu_Ip_Init(0,&Wkpu_Ip_Config_PB);

reset_raw_value = Power_Ip_GetResetRawValue();

reset_reason = Power_Ip_GetResetReason();

Clock_Ip_Init(&Clock_Ip_aClockConfig[0]);

// unknown reset occurred at this timing

while(Hse_Ip_GetHseStatus(MU0) & HSE_STATUS_INIT_OK)

{

;

}

while(1)

{

// main loop

}

// called in main loop

void UserPerformFunctionalReset(void)

{

Power_Ip_PerformReset(&Power_Ip_HwIPsConfigPB);

}

Re: [s32k312]Read reset reason by RTD function, HSE_SWT_RST is occurred after a functional reset.

Julián_AragónM — Mon, 14 Oct 2024 16:35:25 GMT

Hi @mym,

This is usually a clock settings issue. Please check AIPS_SLOW_CLK and HSE_CLK values. Also check DCM record regarding HSE_CLK_MODE_OPTION. With this, you know the ratio (either 1:2 or 1:4) that those clocks shall comply with.

You can test configurations from the S32K3 Reference Manual chapter 24.7.2 System clocking configurations and confirm if the issue persists.

You can refer to these community posts as well:

Best regards,
Julián

Re: [s32k312]Read reset reason by RTD function, HSE_SWT_RST is occurred after a functional reset.

mym — Tue, 15 Oct 2024 10:26:20 GMT

Hi Julián,

Read HSE_CLK_MODE_OPTION is 00b.
Refer to RM, radio between AIPS_SLOW_CLK and HSE_CLK is 1:2.
My clocking configuration is:
CORE_CLK 120MHz
AIPS_PLAT_CLK 60MHz
AIPS_HSE_CLK 30MHz
HSE_CLK 60MHz
DCM_CLK 30MHz
Same as Option B.

I'm not sure what's mean about "00b - Option A" which is said in description of HSE_CLK_MODE_OPTION.
Does it mean I could only use option A Clocking configuration, if my value of HSE_CLK_MODE_OPTION is 00b?

Best regards,
Yimin

Re: [s32k312]Read reset reason by RTD function, HSE_SWT_RST is occurred after a functional reset.

Julián_AragónM — Tue, 15 Oct 2024 21:57:21 GMT

Hi @mym,

The reason for HSE_SWT reset is the lack of Power_Ip_SetMode configuration. Due to this configuration, some clock gating is not set, for example, some clock gating by default conflicts with HSE requirements. HSE SWT RST is usually caused by incorrect clock configuration.

Are you able to share a simple project which replicates the issue in order to test this on my side?

I'm not sure what's mean about "00b - Option A" which is said in description of HSE_CLK_MODE_OPTION. Does it mean I could only use option A Clocking configuration, if my value of HSE_CLK_MODE_OPTION is 00b?

Ratio of 1:2 is ok by default. So, Option A (or Option B with HSE 60MHz) is ok. Otherwise, you may need to change the value of dcf_client_utest_misc.

Best regards,

Julián