topic Spi Configuration on EB tresos in S32K

Spi Configuration on EB tresos

prasadrashinkar — Fri, 11 Oct 2024 05:50:29 GMT

Hello,

I am trying to Configure Two Slave Devices With S32K344 on EB Tresos getting issues while configuring channels and SpiPhyunit please Share some solutions or examples to configure Two slaves on one SPI.

I am using EB Tresos Design Studio 29.0.0 And doing this activity on the S32K344 board.

If anyone has such an example code, please share.

Thanks

#s32k344 #SPI #SPI Slave

Re: Spi Configuration on EB tresos

danielmartynek — Fri, 11 Oct 2024 13:34:58 GMT

Hi @prasadrashinkar,

I don't understand the use case.

Why do you need two Slave instances on one LPSPI module?

S32K344 has 6 LPSPI modules.

Re: Spi Configuration on EB tresos

prasadrashinkar — Wed, 16 Oct 2024 05:09:32 GMT

We want to configure Two Slaves, and we want to use those Using Chip Select. Can you please suggest a configuration or example for this use case?

Re: Spi Configuration on EB tresos

prasadrashinkar — Wed, 16 Oct 2024 05:45:40 GMT

Already other SPI are in use

Re: Spi Configuration on EB tresos

danielmartynek — Wed, 16 Oct 2024 12:11:10 GMT

Hello @prasadrashinkar,

This use case does not make much sense. You could have two different configuration structures for the Slave device (with different chip select) but you would need to reconfigure the LPSPI module every time before the CS is asserted by the master.

If you need more SPI intances, you can use FlexIO to emulate SPI.

Regards,

Daniel

Re: Spi Configuration on EB tresos

prasadrashinkar — Thu, 17 Oct 2024 04:47:51 GMT

We have configured two slaves (MSDI And L99DZ) as Slave devices to LSPI 3 of s32k344.

In the Snap below, we created two channels, two external devices, Two Sequences, Two Jobs, and one SpiPhyunit. Is this configuration correct?

And why we are not able to use one master and two slaves using a chip select?

Re: Spi Configuration on EB tresos

danielmartynek — Thu, 17 Oct 2024 09:25:18 GMT

Refer to the RM, rev.9,

Chapter 70 Low Power Serial Peripheral Interface (LPSPI)

Section 70.6.1 LPSPI register descriptions.

PCS is configured in the Transmit Command register (70.6.1.16 Transmit Command (TCR)).

Thank you