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    <title>topic Re: How to turn on PLL LOL function? in S32K</title>
    <link>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1969198#M41802</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/231581"&gt;@li3&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;For information on the relationship between RUNSW[LBSWPLLEN] and RUNSW[MBSWPLLEN] with PLL LOL, refer section 54.9.6 of the S32K3xx Reference Manual, Rev. 9, bit 20 (LOCKESW) of the ERR_STAT register.&lt;/P&gt;
&lt;P&gt;About PLL LOL configuration, my coworker is already helping you in &lt;A href="https://community.nxp.com/t5/S32K/What-is-S32K3-PLL-Loss-of-Lock/td-p/1967429" target="_blank" rel="noopener"&gt;this&lt;/A&gt; thread.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR, VaneB&lt;/P&gt;</description>
    <pubDate>Tue, 08 Oct 2024 19:12:22 GMT</pubDate>
    <dc:creator>VaneB</dc:creator>
    <dc:date>2024-10-08T19:12:22Z</dc:date>
    <item>
      <title>How to turn on PLL LOL function?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1969018#M41787</link>
      <description>&lt;P&gt;Hi&amp;nbsp;NXP，&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;1. What are the functions of RUNSW.MBSWPLLEN and RUNSW.LBSWPLLEN in the manual? &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;2. What is the relationship between RUNSW.MBSWPLLEN and RUNSW.LBSWPLLEN and PLL LOL?&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;3. How to configure PLL LOL?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="li3_0-1728397754935.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/303446i2AB840374110A2D0/image-size/medium?v=v2&amp;amp;px=400" role="button" title="li3_0-1728397754935.png" alt="li3_0-1728397754935.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards, &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Li 3.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 08 Oct 2024 14:36:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1969018#M41787</guid>
      <dc:creator>li3</dc:creator>
      <dc:date>2024-10-08T14:36:47Z</dc:date>
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    <item>
      <title>Re: How to turn on PLL LOL function?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1969198#M41802</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/231581"&gt;@li3&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;For information on the relationship between RUNSW[LBSWPLLEN] and RUNSW[MBSWPLLEN] with PLL LOL, refer section 54.9.6 of the S32K3xx Reference Manual, Rev. 9, bit 20 (LOCKESW) of the ERR_STAT register.&lt;/P&gt;
&lt;P&gt;About PLL LOL configuration, my coworker is already helping you in &lt;A href="https://community.nxp.com/t5/S32K/What-is-S32K3-PLL-Loss-of-Lock/td-p/1967429" target="_blank" rel="noopener"&gt;this&lt;/A&gt; thread.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR, VaneB&lt;/P&gt;</description>
      <pubDate>Tue, 08 Oct 2024 19:12:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1969198#M41802</guid>
      <dc:creator>VaneB</dc:creator>
      <dc:date>2024-10-08T19:12:22Z</dc:date>
    </item>
    <item>
      <title>Re: How to turn on PLL LOL function?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1969427#M41815</link>
      <description>&lt;P&gt;Hi&amp;nbsp;NXP，&lt;/P&gt;&lt;P&gt;1.&lt;SPAN&gt;According to the manual, LOL can only be used in PLL functional mode, so PLL is configured to automatically open LOL in functional mode?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;2.Will LOL turn on automatically after PLL is configured to function? I want to know how to turn on the LOL function.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;3.&lt;SPAN class=""&gt;Is PLL enabled, PLL register configured, LOL enabled to provide interfaces?&lt;/SPAN&gt;&lt;SPAN class=""&gt; Where is the interface provided in the project?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="li3_0-1728442570523.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/303573i46D677CD49E500EC/image-size/medium?v=v2&amp;amp;px=400" role="button" title="li3_0-1728442570523.png" alt="li3_0-1728442570523.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="li3_1-1728442570520.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/303574iA750F7D056DBF398/image-size/medium?v=v2&amp;amp;px=400" role="button" title="li3_1-1728442570520.png" alt="li3_1-1728442570520.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Li 3.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 09 Oct 2024 03:08:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1969427#M41815</guid>
      <dc:creator>li3</dc:creator>
      <dc:date>2024-10-09T03:08:53Z</dc:date>
    </item>
    <item>
      <title>Re: How to turn on PLL LOL function?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1969672#M41837</link>
      <description>Two more questions remain: What is the PLL frequency above which an LOL event is triggered? Can this error range be set?</description>
      <pubDate>Wed, 09 Oct 2024 07:43:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1969672#M41837</guid>
      <dc:creator>li3</dc:creator>
      <dc:date>2024-10-09T07:43:16Z</dc:date>
    </item>
    <item>
      <title>Re: How to turn on PLL LOL function?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1969678#M41838</link>
      <description>Add a sixth question: if LOL is incorrectly configured as an interrupt, where is the interrupt function? How to configure interrupt module?</description>
      <pubDate>Wed, 09 Oct 2024 07:49:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1969678#M41838</guid>
      <dc:creator>li3</dc:creator>
      <dc:date>2024-10-09T07:49:33Z</dc:date>
    </item>
    <item>
      <title>Re: How to turn on PLL LOL function?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1970277#M41860</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/231581"&gt;@li3&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;No configuration is required to enable LOL functionality. Each PLL on the chip includes a lock-status that is continuously monitored to report Loss of Lock (LOL) condition (a fault&lt;BR /&gt;has occurred). A fault occurs when a PLL clock is outside the range of correct operating conditions (PLL source frequency limits are provided in the S32K3xx Data Sheet, Rev. 10).&lt;/P&gt;
&lt;P&gt;As for the interrupt, as my coworker mentioned, you need to set field DEST_RST9_AS_IPI to 1 (of register DCMRWP3) to configure a destructive reset to interrupt. Refer to section 31.4.2.2&lt;BR /&gt;(Destructive reset event bypass) of the S32K3xx Reference Manual, Rev. 9.&lt;/P&gt;</description>
      <pubDate>Wed, 09 Oct 2024 18:24:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1970277#M41860</guid>
      <dc:creator>VaneB</dc:creator>
      <dc:date>2024-10-09T18:24:36Z</dc:date>
    </item>
    <item>
      <title>Re: How to turn on PLL LOL function?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1971052#M41886</link>
      <description>&lt;P&gt;Hi&amp;nbsp;NXP，&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;1. What are the three PLL clock modes?&lt;/SPAN&gt;&lt;SPAN class=""&gt; What's the difference?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="li3_0-1728542784076.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/303950iCC2161A879E76016/image-size/medium?v=v2&amp;amp;px=400" role="button" title="li3_0-1728542784076.png" alt="li3_0-1728542784076.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;2. Are there any differences in the LOL monitoring methods corresponding to these three PLL clock modes?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Li 3.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 10 Oct 2024 06:47:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1971052#M41886</guid>
      <dc:creator>li3</dc:creator>
      <dc:date>2024-10-10T06:47:05Z</dc:date>
    </item>
    <item>
      <title>Re: How to turn on PLL LOL function?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1971530#M41903</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/231581"&gt;@li3&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;1. Depending on the configured PLL operating mode, will be determine the relationship between fVCO and PLL reference frequency. Refer to section 30.3.3 (Clock configuration) of the chip's reference manual.&lt;/P&gt;
&lt;P&gt;2. As previously said, a Loss of Lock (LOL) condition occurs when a PLL clock is outside the range of correct operating conditions. Therefore, you should only not violate the maximum system clock frequency or maximum and minimum VCO frequency specification of PLL.&lt;/P&gt;</description>
      <pubDate>Thu, 10 Oct 2024 16:47:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1971530#M41903</guid>
      <dc:creator>VaneB</dc:creator>
      <dc:date>2024-10-10T16:47:03Z</dc:date>
    </item>
    <item>
      <title>Re: How to turn on PLL LOL function?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1971798#M41920</link>
      <description>&lt;P&gt;Hi NXP,&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;1. What is the frequency range for the three PLL clock modes to LOL?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="li3_0-1728615212914.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/304133iBA9552A63D961560/image-size/medium?v=v2&amp;amp;px=400" role="button" title="li3_0-1728615212914.png" alt="li3_0-1728615212914.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;2. After LOL is configured as an interrupt, how to configure the interrupt in the program?&lt;/SPAN&gt;&lt;SPAN class=""&gt; Is the callback function generated automatically?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Li 3&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 11 Oct 2024 02:57:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1971798#M41920</guid>
      <dc:creator>li3</dc:creator>
      <dc:date>2024-10-11T02:57:02Z</dc:date>
    </item>
    <item>
      <title>Re: How to turn on PLL LOL function?</title>
      <link>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1972309#M41960</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/231581"&gt;@li3&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;1. PLL source frequency limits are&amp;nbsp;independent of the operating mode. Refer to section 11.3 (PLL) of the S32K3xx Data Sheet, Rev. 10.&lt;/P&gt;
&lt;P&gt;2. If you are using RTD, the PLL LOL interrupt is defined as SoC_PLL_IRQn.&lt;/P&gt;</description>
      <pubDate>Fri, 11 Oct 2024 17:43:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/How-to-turn-on-PLL-LOL-function/m-p/1972309#M41960</guid>
      <dc:creator>VaneB</dc:creator>
      <dc:date>2024-10-11T17:43:33Z</dc:date>
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