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    <title>topic Re: eMIOS Channel Internal Timebase Interference in S32K</title>
    <link>https://community.nxp.com/t5/S32K/eMIOS-Channel-Internal-Timebase-Interference/m-p/1964742#M41483</link>
    <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/188029"&gt;@Senlent&lt;/a&gt;&amp;nbsp;,&lt;BR /&gt;&lt;BR /&gt;Thank you for your message!&lt;BR /&gt;&lt;BR /&gt;Any thoughts on when reading A and B in the IPM mode, FLAG bit doesn't get set and instead I have the&amp;nbsp;OVFL bit?&lt;BR /&gt;&lt;BR /&gt;Thanks!&lt;BR /&gt;Vusal&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;</description>
    <pubDate>Mon, 30 Sep 2024 20:23:00 GMT</pubDate>
    <dc:creator>vusal</dc:creator>
    <dc:date>2024-09-30T20:23:00Z</dc:date>
    <item>
      <title>eMIOS Channel Internal Timebase Interference</title>
      <link>https://community.nxp.com/t5/S32K/eMIOS-Channel-Internal-Timebase-Interference/m-p/1963762#M41423</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;Does the internal counter have an effect outside of its own channel? For example, if I have two channels (one input and one output) running on their own internal timebase will they interfere with each other? In this diagram it seems like the internal counter feeds back to the Counter bus.&lt;BR /&gt;&lt;BR /&gt;Thanks!&lt;BR /&gt;Vusal&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="vusal_0-1727472777709.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/301773iA320671F6757B663/image-size/medium?v=v2&amp;amp;px=400" role="button" title="vusal_0-1727472777709.png" alt="vusal_0-1727472777709.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 27 Sep 2024 21:34:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/eMIOS-Channel-Internal-Timebase-Interference/m-p/1963762#M41423</guid>
      <dc:creator>vusal</dc:creator>
      <dc:date>2024-09-27T21:34:54Z</dc:date>
    </item>
    <item>
      <title>Re: eMIOS Channel Internal Timebase Interference</title>
      <link>https://community.nxp.com/t5/S32K/eMIOS-Channel-Internal-Timebase-Interference/m-p/1963764#M41424</link>
      <description>&lt;P&gt;BTW, this is for s32K3xx.&lt;/P&gt;</description>
      <pubDate>Fri, 27 Sep 2024 21:38:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/eMIOS-Channel-Internal-Timebase-Interference/m-p/1963764#M41424</guid>
      <dc:creator>vusal</dc:creator>
      <dc:date>2024-09-27T21:38:14Z</dc:date>
    </item>
    <item>
      <title>Re: eMIOS Channel Internal Timebase Interference</title>
      <link>https://community.nxp.com/t5/S32K/eMIOS-Channel-Internal-Timebase-Interference/m-p/1963869#M41432</link>
      <description>&lt;P&gt;&lt;A href="mailto:Hi@vusal" target="_blank"&gt;Hi@vusal&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Some channels have internal counters, which can be output as Couner_bus_A, Couner_bus_B, Couner_bus_C, Couner_bus_D, Couner_bus_F.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Senlent_0-1727576644885.png" style="width: 705px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/301796iB4682DE9FF9FC710/image-dimensions/705x610?v=v2" width="705" height="610" role="button" title="Senlent_0-1727576644885.png" alt="Senlent_0-1727576644885.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sun, 29 Sep 2024 02:24:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/eMIOS-Channel-Internal-Timebase-Interference/m-p/1963869#M41432</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2024-09-29T02:24:24Z</dc:date>
    </item>
    <item>
      <title>Re: eMIOS Channel Internal Timebase Interference</title>
      <link>https://community.nxp.com/t5/S32K/eMIOS-Channel-Internal-Timebase-Interference/m-p/1964742#M41483</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/188029"&gt;@Senlent&lt;/a&gt;&amp;nbsp;,&lt;BR /&gt;&lt;BR /&gt;Thank you for your message!&lt;BR /&gt;&lt;BR /&gt;Any thoughts on when reading A and B in the IPM mode, FLAG bit doesn't get set and instead I have the&amp;nbsp;OVFL bit?&lt;BR /&gt;&lt;BR /&gt;Thanks!&lt;BR /&gt;Vusal&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 30 Sep 2024 20:23:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/eMIOS-Channel-Internal-Timebase-Interference/m-p/1964742#M41483</guid>
      <dc:creator>vusal</dc:creator>
      <dc:date>2024-09-30T20:23:00Z</dc:date>
    </item>
    <item>
      <title>Re: eMIOS Channel Internal Timebase Interference</title>
      <link>https://community.nxp.com/t5/S32K/eMIOS-Channel-Internal-Timebase-Interference/m-p/1964873#M41491</link>
      <description>&lt;P&gt;&lt;A href="mailto:Hi@vusal" target="_blank"&gt;Hi@vusal&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;please read the S32K3'RM ,the chapter&amp;nbsp;&lt;STRONG&gt;63.5.3.11 Input Period Measurement (IPM) Mode&lt;/STRONG&gt; for detail.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Senlent_0-1727747508389.png" style="width: 727px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/302117i6A9E55CC2AF01A5D/image-dimensions/727x450?v=v2" width="727" height="450" role="button" title="Senlent_0-1727747508389.png" alt="Senlent_0-1727747508389.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 01 Oct 2024 01:52:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/S32K/eMIOS-Channel-Internal-Timebase-Interference/m-p/1964873#M41491</guid>
      <dc:creator>Senlent</dc:creator>
      <dc:date>2024-10-01T01:52:38Z</dc:date>
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